Senior PCB Layout Engineer for AI Accelerator HW (Onsite)

Acceler8 Talent; Mountain View (CA); On-site; USD 150,000 - 230,000; Full time

Job summary

Acceler8 Talent is hiring a PCB Layout Engineer in Mountain View, CA, onsite, to own the physical design of high-speed, high-power boards for AI accelerator systems. You will drive stackups, impedance control, BGA routing, and fabrication releases while working closely with SI/PI, packaging, and hardware teams.

The role emphasizes end-to-end layout ownership, manufacturability, and collaboration with contract manufacturers, with final compensation commensurate with experience.

Qualifications

• 8+ years of professional PCB layout experience in high-performance hardware.
• Strong expertise in complex, high-layer-count PCB designs with high-speed signaling and high-current power delivery.
• Advanced knowledge of controlled impedance, stackup definition, return-path design, crosstalk management, and signal integrity constraints.
• Experience with fine-pitch BGA escape routing, length/skew matching, and via optimization.
• Proficiency with industry-standard PCB layout tools such as Cadence Allegro, Siemens Xpedition, Altium Designer, or equivalent.
• Experience preparing manufacturing release packages using Gerber, ODB++, IPC-2581, or equivalent formats.
• Demonstrated ability to collaborate with SI/PI, packaging, and hardware engineering teams to implement and close complex electrical constraints.

Responsibilities

• Own end-to-end PCB layout for advanced AI accelerator systems, including stackup definition, impedance control, component placement, high-speed routing, and fabrication release.
• Design and optimize high-current power delivery layouts for accelerator hardware.
• Perform complex BGA escape routing for large, fine-pitch accelerator packages.
• Implement high-speed layout constraints, including length and skew matching, return-path management, crosstalk mitigation, and via optimization.
• Collaborate with SI/PI, packaging, and hardware systems teams to ensure electrical performance across package-to-board interfaces.
• Drive design for manufacturability and assembly (DFM/DFA) with PCB fabrication and contract manufacturing partners.
• Support board bring-up, debugging, and resolution of layout-related electrical issues.
• Develop and leverage AI-assisted design tools to accelerate layout, design reviews, and design-rule checking.

Skills

PCB layout

Signal integrity

Power delivery

High-speed routing

DFM/ DFA

Tools

Cadence Allegro

Siemens Xpedition

Altium Designer

Gerber/IPC-2581

Job description

Acceler8 Talent is hiring a PCB Layout Engineer in Mountain View, CA, onsite, to own the physical design of high-speed, high-power boards for AI accelerator systems. You will drive stackups, impedance control, BGA routing, and fabrication releases while working closely with SI/PI, packaging, and hardware teams.

The role emphasizes end-to-end layout ownership, manufacturability, and collaboration with contract manufacturers, with final compensation commensurate with experience.