PCB Layout Design Engineer

INFOTRON

Oregon

Hybrid

USD 110.000 - 170.000

Vollzeit

Vor 6 Tagen
Sei unter den ersten Bewerbenden

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Benefits dieser Stelle

Flexible work from home

Zusammenfassung

INFOTRON is seeking an experienced PCB Layout Design Engineer to support the development of advanced, high-speed electronic systems. The role requires hands-on Altium Designer expertise and a background in dense PCB layouts, impedance control, and signal integrity for 1-10+ Gbps designs.

The position offers Hybrid or Fully Remote work, with a contract through December 2026 and potential extension or conversion based on budget approval.

Qualifikationen

  • Experience designing and routing high-speed PCBs (1-10+ Gbps).
  • Strong knowledge of stack-ups, impedance control, and BGA layouts.
  • Experience with PCB fabrication and manufacturing processes.

Aufgaben

  • Design high-speed PCB layouts for GPU/CPU/server HPC platforms.
  • Define placement, footprints, routing strategies, stack-ups, and constraints.
  • Develop and apply layout rules for high-speed interfaces (PCIe, memory, SERDES, power delivery).
  • Collaborate with SI, PI, mechanical, thermal, and manufacturing teams.
  • Perform DRC checks and PCB verification for release readiness.
  • Produce manufacturing outputs (ODB++/Gerber) and fabrication docs.
  • Ensure electrical performance, manufacturability, and reliability.
  • Support design reviews and issue resolution throughout development.

Kenntnisse

PCB Layout Design
High-Speed Routing
Impedance Control
Collaboration

Tools

Altium Designer

Jobbeschreibung

PCB Layout Design EngineerLocation: Mountain View, CA (Hybrid) or Fully RemoteEmployment Type: Contract through December 2026, with potential extension or conversion to full-time based on 2027 budget approval.

Job Overview
  • We are seeking an experienced PCB Layout Design Engineer to support the development of advanced, high-speed electronic systems for next-generation computing platforms. The ideal candidate will have strong hands-on experience with Altium Designer and a dedicated background in PCB layout design, including complex routing, dense BGA designs, stack-up development, and signal integrity considerations.
  • Experience with high-speed designs in the 1-10+ Gbps range is preferred. Experience with 200 Gbps designs is not required.
Key Responsibilities
  • Design and develop high-speed PCB layouts for advanced GPU, CPU, server, and high-performance computing platforms.
  • Define component placement, ASIC ball-out, footprints, routing strategies, stack-ups, and design constraints.
  • Develop and implement layout rules for high-speed interfaces, including PCIe, memory, SERDES, and power delivery networks.
  • Collaborate with Signal Integrity (SI), Power Integrity (PI), mechanical, thermal, packaging, and manufacturing teams.
  • Perform design rule checks (DRC) and PCB verification to ensure design quality and release readiness.
  • Generate and review manufacturing deliverables, including ODB++, Gerber files, and fabrication documentation.
  • Ensure PCB designs meet electrical performance, manufacturability, and reliability requirements.
  • Participate in design reviews and resolve PCB layout issues throughout the development lifecycle.
Required Qualifications
  • Strong hands-on experience with Altium Designer.
  • Professional experience in a dedicated PCB Layout Design role.
  • Experience designing and routing complex, high-speed PCBs.
  • Understanding of high-speed routing, impedance control, stack-up development, and dense BGA layouts.
  • Familiarity with PCB fabrication, assembly, and manufacturing processes.
  • Experience with high-speed interfaces operating in the 1-10+ Gbps range or higher.
  • Strong collaboration and communication skills to work effectively with cross-functional engineering teams.
Preferred Qualifications
  • Experience with CPU, GPU, server, data center, or high-performance computing hardware.
  • Knowledge of HDI PCB technologies and power delivery network design.
  • Experience partnering with Signal Integrity and Power Integrity teams.
  • Familiarity with PCIe, memory interfaces, and SERDES technologies.
  • Experience with ASIC-driven PCB development workflows and design automation.
  • Experience generating and reviewing ODB++, Gerber, and fabrication outputs.

Flexible work from home options available.

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