Senior PCB Designer for Spaceborne RF & SAR

Kapta Space

Seattle (WA)

On-site

USD 110,000 - 160,000

Full time

14 days+
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Job summary

Kapta Space in Seattle, WA is seeking a Senior PCB Designer to own the architecture, execution, and QA of high-speed, RF and power boards for our spaceborne SAR hardware. This role blends hands-on layout work with adherence to aerospace standards and collaborative review processes.

You will collaborate with a Responsible Engineer to define stack-ups, routing strategies, and DFM/DFT, lead multi-layer layouts with BGAs and SERDES, and ensure EMI/EMC compliance, manufacturability, and

Qualifications

  • Associates or Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline (or demonstrated equivalent skills and experience)
  • Significant experience of professional PCB layout experience
  • Significant experience as a principal-level individual contributor working with multi-disciplinary engineering teams delivering complex spaceborne hardware
  • Expert proficiency in Altium Designer and strong command of constraint-driven design
  • Understanding of impedance control, differential pair routing, grounding strategies, thermal management, and EMI/EMC mitigation
  • Significant experience with DFM/DFA/DFT principles and close collaboration with PCB fabrication and assembly vendors
  • Familiarity with aerospace or defense hardware design requirements (shock, vibration, thermal, radiation, reliability)
  • Experience leading Altium toolchain integration, library management, and automation/scripting
  • Excellent communication skills, with ability to present to senior leadership and collaborate with customers and suppliers
  • Must be eligible to work on U.S. export-controlled projects (ITAR)

Responsibilities

  • PCB layout design for high-speed digital, mixed-signal, RF front-end, and power management boards supporting spaceborne radar payloads and phased-array antenna modules
  • In collaboration with the Responsible Engineer (RE), provide inputs to define and maintain board-level architecture, layer stack-ups, and routing strategies ensuring signal integrity, impedance control, and EMI/EMC compliance
  • Execute detailed component placement and routing for complex multi-layer designs including high-density BGAs, SERDES, DDR, FPGA, and high-frequency RF interconnects
  • Perform full lifecycle design ownership — from schematic collaboration and layout execution, DFM efforts through fabrication, assembly, and bring-up support
  • Partner with RE to integrate board design within mechanical, RF, thermal, and system-level constraints, ensuring mechanical compatibility, manufacturability, and serviceability
  • Serve as point of contact for standardized PCB layout , DFM/DFA/DFT rules, ECAD constraint management, and centralized component-library oversight
  • Partake in formal design reviews, enforce design rules, and ensure documentation packages meet aerospace and defense standards
  • Coordinate with Contract Design Services partners to ensure alignment with internal engineering standards and deliverables. Collaborate with RE and Program Office to support PCB fabrication and assembly vendors DFM and inquiries, ensuring compliance with stack‑up, impedance, and material specifications for space/defense environments
  • Contribute to supply-chain readiness and material qualification efforts for high-reliability boards (e.g., polyimide, low-outgassing, or radiation-tolerant materials)

Skills

Altium Designer
Constraint-driven design
Impedance control
High-speed routing
DFM/DFT/DFT
Aerospace hardware
Team leadership
Communication skills
ITAR compliance

Education

Bachelor's degree in Electrical Engineering
Related discipline or demonstrated equivalent skills

Tools

Altium toolchain
ECAD libraries
Scripting/automation

Job description

Kapta Space in Seattle, WA is seeking a Senior PCB Designer to own the architecture, execution, and QA of high-speed, RF and power boards for our spaceborne SAR hardware. This role blends hands-on layout work with adherence to aerospace standards and collaborative review processes.

You will collaborate with a Responsible Engineer to define stack-ups, routing strategies, and DFM/DFT, lead multi-layer layouts with BGAs and SERDES, and ensure EMI/EMC compliance, manufacturability, and

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