Senior PCB Design Engineer: ECAD & Library Architect

GE Vernova; Rochester (MN); In loco; USD 80.000 - 120.000; Tempo pieno

Vantaggi offerti da questo lavoro

Medical, dental, vision

401(k) with company match

Tuition assistance

Paid holidays

Descrizione del lavoro

GE Vernova is seeking a PCB Design Engineer for Critical Infrastructure Communications. You will own ECAD governance, manage global Altium libraries, and lead PCB layouts for high-density boards across international teams.

Strong Altium skills and hardware design experience are required to drive standards, documentation, and cross-functional collaboration. The role emphasizes maintaining centralized ECAD data, enforcing DFM, and coordinating ECOs while ensuring EMI/EMC and RF considerations are

Competenze

• Bachelor’s degree in Electrical Engineering or related field.
• Minimum 3 years in complex multi-layer PCB layout and Altium Designer usage.
• Minimum 2 years managing centralized ECAD libraries.
• Minimum 3 years in electronic hardware design.

Mansioni

• ECAD Governance: lead global Altium ECAD databases and master library creation.
• PCB Layout Execution: end-to-end design including multi-layer stackups and high-speed routing.
• Design for Manufacturing: enforce DFM guidelines with manufacturing teams.
• Lifecycle & Sustaining: manage ECOs for library and board design updates.

Conoscenze

PCB Layout

ECAD Governance

High-speed routing

Cross-functional collab

Formazione

Bachelor's degree in Electrical Engineering

Strumenti

Altium Designer

IPC footprints

ECAD libraries

Descrizione del lavoro

GE Vernova is seeking a PCB Design Engineer for Critical Infrastructure Communications. You will own ECAD governance, manage global Altium libraries, and lead PCB layouts for high-density boards across international teams.

Strong Altium skills and hardware design experience are required to drive standards, documentation, and cross-functional collaboration. The role emphasizes maintaining centralized ECAD data, enforcing DFM, and coordinating ECOs while ensuring EMI/EMC and RF considerations are