Senior PCB Designer (Altium) – Hybrid Role + ESOP

Corvid Technologies LLC; Langtree (NC); Hybrid; USD 90,000 - 130,000; Full time

Benefits offered by this job

Health coverage

Retirement plans

Generous time-off policies

Gym membership reimbursement

ESOP program

Job summary

Corvid Technologies is seeking an experienced PCB Designer to support multiple programs with multilayer routing and end-to-end component lifecycle management. You will create and maintain schematics, libraries, and footprints in Altium, coordinate with mechanical teams for 3D STEP modeling, and ensure IPC standards are met.

The candidate will collaborate across technical groups, perform DFM/DFT reviews, and help establish component and library standards, including naming conventions and layer

Qualifications

• US Citizen required.
• Experience with Altium Designer including ECAD layout and library tasking.
• Impedance control and stack-up design is beneficial; SI/EMI knowledge preferred.
• CID or CID+ certification is preferred.

Responsibilities

• Layout Execution: multi-layer routing on IPC Class 2/3 designs including high-speed interfaces and analog signals.
• Output Generation: fabrication/assembly packages (Gerber, ODB++, drill files, pick-and-place, drawings).
• 3D Modeling: integrate STEP models; ensure PCB-to-enclosure fit with Mechanical Engineers.
• Component Creation: develop schematic symbols and IPC-7351 footprints within Altium; lifecycle management.
• Standards Knowledge: IPC-6011/12/13/2221/2/3/1, J-STD-001.

Skills

Altium Designer

ECAD layout

Impedance control

Signal integrity

EMI best practices

Tools

Altium CoDesigner

Job description

Corvid Technologies is seeking an experienced PCB Designer to support multiple programs with multilayer routing and end-to-end component lifecycle management. You will create and maintain schematics, libraries, and footprints in Altium, coordinate with mechanical teams for 3D STEP modeling, and ensure IPC standards are met.

The candidate will collaborate across technical groups, perform DFM/DFT reviews, and help establish component and library standards, including naming conventions and layer