Senior NPU Architect: High-Performance SoC Innovation

Samsung-Research-America; Mountain View (CA); On-site; USD 204,000 - 306,000; Full time

Job summary

Samsung Research America seeks a senior NPU Architect to lead the design of next‑generation NPU subsystems within high‑performance SOCs. You will drive architectural exploration, performance modeling, and HW/SW co‑optimization for AI workloads in Galaxy devices.

The role requires deep expertise in NPU microarchitecture, CNN/LLM workloads, and collaboration across hardware, software, and system teams to deliver compelling PPA improvements.

Qualifications

• Bachelor’s/Master’s/PhD in Electrical, Computer Science or related field.
• 14+ years of experience in NPU architecture & development.
• Hands-on experience in cycle-accurate performance and functional models.
• Proficient in Python, System C and/or C++.
• Experience with ML frameworks (TensorFlow, PyTorch, ONNX).
• Experience in SoC microarchitecture and interface subsystems.

Responsibilities

• Propose NPU architectural/micro-architectural features to boost PPA for next-gen SOCs.
• Perform high-level performance modeling/analysis of NPU features and workloads.
• Develop cycle-accurate and analytical NPU performance models and correlate with silicon.
• Deliver architecture proposals and specs to design teams and leadership.
• Analyze benchmarks and workloads for architecture/micro-architecture optimizations.
• Map AI use cases to NPU.
• Co-design SW/HW for low power and high performance.
• Collaborate across teams to implement architecture proposals across SOC, Driver, OS.

Skills

NPU architecture

Performance modeling

Python

C++

ML frameworks

CNN/LLM knowledge

Team collaboration

Education

Bachelor/Master/PhD in Electrical/CS

Tools

Platform Architect

SoC microarchitecture

Job description

Samsung Research America seeks a senior NPU Architect to lead the design of next‑generation NPU subsystems within high‑performance SOCs. You will drive architectural exploration, performance modeling, and HW/SW co‑optimization for AI workloads in Galaxy devices.

The role requires deep expertise in NPU microarchitecture, CNN/LLM workloads, and collaboration across hardware, software, and system teams to deliver compelling PPA improvements.