Senior ML Compute ASIC Integration Engineer

SPD Technology; United States; Remote; USD 150,000 - 230,000; Full time

Job summary

SPD Technology is hiring a Senior Silicon System and Software Integration Engineer to drive end-to-end hardware/software integration for ML accelerator projects. You will bridge specification, design and verification teams, and work across compiler and performance groups in a fully remote, flexible setup.

You bring 5+ years in ASIC/embedded domains, strong C++/Python, RTL, FPGA, and firmware experience, with a track record in accelerators.

Qualifications

• Bachelor's degree in a technical field or equivalent practical experience.
• 5+ years in two of: computer architecture, embedded firmware, ASIC design/verification, or IP integration.
• Experience with hardware/software integration and validation.
• Strong RTL development, verification, and evaluation background.
• Experience integrating complex hardware/software systems in accelerators.

Responsibilities

• Review chip specs and designs; develop integration plans with software and system teams.
• Lead ML compute feature bringup; validate complex hardware/software, including IPs.
• Develop validation firmware to verify hardware functionality.
• Execute hardware/software co-simulation using RTL, emulation, and FPGA environments.
• Use architectural models to correlate results and drive improvements.
• Design validation tests and microbenchmarks for IP functionality and performance.
• Author test plans with cross-functional teams (Design, DV, Firmware, Architecture).
• Lead debugging discussions to diagnose failures and performance issues.

Skills

C++

Python

RTL

Firmware

RTOS internals

Hardware/software integration

Education

Bachelor's degree in Electrical Engineering, Computer Engineering or Computer Science

Master's degree or PhD in Electrical/Computer Engineering or Computer Science

Tools

RTL simulators

FPGA

Design verification tools

Job description

SPD Technology is hiring a Senior Silicon System and Software Integration Engineer to drive end-to-end hardware/software integration for ML accelerator projects. You will bridge specification, design and verification teams, and work across compiler and performance groups in a fully remote, flexible setup.

You bring 5+ years in ASIC/embedded domains, strong C++/Python, RTL, FPGA, and firmware experience, with a track record in accelerators.