Senior MEMS IC Layout & Routing Engineer

Quantinuum; Broomfield (CO); On-site; USD 115,000 - 145,000; Full time

Benefits offered by this job

Competitive compensation

Flexible work arrangements

Employer-subsidized healthcare

401(k) with company match

Equity opportunities

Generous paid time off and holidays

Job summary

Quantinuum, a leader in quantum computing, seeks an Advanced Semiconductor/MEMS Layout & Routing Engineer to translate device concepts into manufacturable mask layouts from design through tapeout. You’ll work with design engineers, fabrication scientists, and external foundries to meet PDK and process requirements.

The role emphasizes cross-functional teamwork, process refinement, and automation to shorten design cycles while maintaining high precision in ion trap device layouts.

Qualifications

• Bachelor’s degree required.
• 5+ years IC/MEMS/PCB layout experience with advanced EDA tools.
• 2+ years with PDKs, layout hierarchy, routing, verification and tapeout processes.
• U.S. person required per contractual and national security requirements.
• Candidates not U.S. citizens must have legal eligibility to work in the U.S.

Responsibilities

• Develop and refine mask layouts for ion trap devices using Cadence Virtuoso, klayout, scripting and related tools.
• Collaborate with design engineers and fabrication scientists to resolve layout challenges and support PDK integration.
• Coordinate with external foundries to align layouts and tapeout deliverables with PDKs and process requirements.
• Identify automation opportunities and AI/ML approaches to speed up workflows.

Skills

IC/PCB/MEMS layout

PDK workflow

Layout automation

Scripting

Education

Bachelor’s degree

Tools

Cadence Virtuoso

klayout

L-Edit

Job description

Quantinuum, a leader in quantum computing, seeks an Advanced Semiconductor/MEMS Layout & Routing Engineer to translate device concepts into manufacturable mask layouts from design through tapeout. You’ll work with design engineers, fabrication scientists, and external foundries to meet PDK and process requirements.

The role emphasizes cross-functional teamwork, process refinement, and automation to shorten design cycles while maintaining high precision in ion trap device layouts.