Senior Memory Design Engineer – Lead Embedded SRAM/TCAM

MediaTek; San Jose (CA); Hybrid; USD 179,000 - 256,000; Full time

Benefits offered by this job

Health insurance

Paid time off (PTO)

Parental leave

401K

Job summary

MediaTek Research Lab Inc. in San Jose seeks a senior memory design engineer to define and design custom memory blocks (SRAM/TCAM) for Cloud AI and data center ASICs.

You will collaborate with product and architecture teams, mentor layout engineers, and drive DV plans across global CAD teams. The ideal candidate has 10+ years in embedded memory design, a PhD or MS in EE, experience with PrimeTime/Nanotime, and scripting in Perl/Python.

Qualifications

• 10+ years of embedded memory (SRAM/TCAM) design for ASICs or high‑performance processors.
• PhD or MS in Electrical Engineering.
• Strong SRAM/TCAM and digital circuit background for advanced nodes.
• Experience with complete SRAM memory design cycle and compiler development.
• Supervise layout engineers and coordinate layouts in advanced nodes.
• Experience with industry tools and DV plans; silicon bring-up knowledge.

Skills

SRAM/TCAM design

Digital circuit design

Perl/Python scripting

Clocked/static circuits

Education

PhD or MS in Electrical Engineering

Tools

PrimeTime

Nanotime

ESPCV

Job description

MediaTek Research Lab Inc. in San Jose seeks a senior memory design engineer to define and design custom memory blocks (SRAM/TCAM) for Cloud AI and data center ASICs.

You will collaborate with product and architecture teams, mentor layout engineers, and drive DV plans across global CAD teams. The ideal candidate has 10+ years in embedded memory design, a PhD or MS in EE, experience with PrimeTime/Nanotime, and scripting in Perl/Python.