Senior Mask Layout Design Engineer

NVIDIA; Santa Clara (CA); On-site; USD 124,000 - 230,000; Full time

Job summary

Join a dynamic team as a Senior Mask Layout Design Engineer, where you'll contribute to high-speed mixed-signal circuit designs. This innovative firm is at the forefront of GPU technology and AI, constantly evolving to tackle new challenges. Your role will involve performing physical layouts in cutting-edge CMOS technologies and collaborating with talented engineers to integrate designs into VLSI products. With a strong focus on creativity and intelligence, this opportunity promises a rewarding environment where your skills will amplify human potential. If you're ready to make an impact in a diverse and inclusive workplace, this is the perfect role for you.

Qualifications

• 8+ years of relevant mask design/layout experience.
• Deep understanding of analog circuit layout concepts.

Responsibilities

• Perform physical layout for mixed-signal functions using Cadence tools.
• Collaborate with ASIC engineers for design integration.

Skills

Mask Design/Layout

Analog Circuit Layout

High-Speed I/O Design

Scripting (Perl, Python, Skill)

Interpersonal Skills

Education

BSEE

MSEE

Tools

Cadence Virtuoso

ICV/Calibre

Job description

Are you interested in joining our dynamic team? If yes, we are looking for a Senior Mask Layout Design Engineer — someone excited to join a growing, diverse group responsible for high-speed mixed-signal circuit designs!

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to tackle, only we can pursue, and that matter to the world. This is our life’s work: to amplify human creativity and intelligence.

What you'll be doing:

• Perform physical layout for mixed-signal functions like PLLs, high-speed I/O circuits, general I/Os, and ESD structures in innovative sub-micron CMOS technologies using Cadence tools.
• Collaborate with ASIC and mixed-signal engineers to customize designs for integration in VLSI products. Duties include floor planning, custom layout, and verification against design rules and schematics.

What we need to see:

• Hold a BSEE or equivalent experience; MSEE is a plus.
• 8+ years of relevant mask design/layout experience.
• Experience with tape-out in FinFET technology, especially TSMC N5/N4/N3, is required.
• Experience with high-speed SerDes/RF layout design and top-level integration is beneficial.
• Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
• Proven experience with Cadence Virtuoso and verification tools like ICV/Calibre for DRC and LVS checks.
• Ability to work effectively in a team, with good interpersonal skills and positive energy.
• Scripting skills in Perl, Python, or Skill are a plus.
• Knowledge of DRC and LVS flows, including customizing decks.

The base salary range is $124,000 – $230,000, determined by location, experience, and current market rates. You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We value diversity and do not discriminate based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability, or any other characteristic protected by law.