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Benefits offered by this job
Competitive salary
Annual discretionary bonus program
Annual RSU grants
Job summary
A leading technology company based in Santa Clara, California is looking for an experienced ASIC Design Engineer to join their Integrated Wireless Technology team. As a key contributor, you will develop micro-architecture specifications and design low-power solutions within the full ASIC development cycle. Candidates should have significant experience in ASIC design, low power strategies, and silicon debug. This role offers a competitive salary and benefits package, reflecting Qualcomm's commitment to its employees.
Qualifications
7+ years of working experience in ASIC Design.
2+ years in low power micro-architecture, Design, Power Intent/Implementation.
Experience in silicon bring up and debug is a must.
Responsibilities
Develop technical specifications from architectural requirements.
Deliver detailed low power micro-architecture and design.
Participate in debug phase and develop verification plans.
Skills
ASIC Design
Low Power Micro-architecture
Power Intent/Implementation
Power Reduction Techniques
SoC Design
Silicon Bring Up
Education
Bachelor's degree in Science, Engineering, or related field
Master's degree in Science, Engineering, or related field
PhD in Science, Engineering, or related field
Tools
AMBA bus protocols
PCIE/USB peripherals
Job description
A leading technology company based in Santa Clara, California is looking for an experienced ASIC Design Engineer to join their Integrated Wireless Technology team. As a key contributor, you will develop micro-architecture specifications and design low-power solutions within the full ASIC development cycle. Candidates should have significant experience in ASIC design, low power strategies, and silicon debug. This role offers a competitive salary and benefits package, reflecting Qualcomm's commitment to its employees.