Senior Low-Latency Risk Engine Lead (Hybrid)

Citigroup Inc.

United States

Hybrid

USD 180,000 - 260,000

Full time

3 days ago
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Benefits offered by this job

27 days annual leave
Discretionary annual bonus
Private Medical Care & Life Insurance
Employee Assistance Program
Pension Plan
Paid Parental Leave
Special discounts for employees

Job summary

Citigroup Inc. seeks an experienced Senior Software Engineer to own critical latency-sensitive risk-checking components in the cash equities trading hot path.

You will ensure pre-trade risk controls operate with microsecond performance while maintaining correctness and resilience at scale, and mentor engineers across global centers. You will design and implement ultra-low-latency risk engine, IPC frameworks with Aeron/Solace, optimize JVM/C++ performance, and lead cross-functional delivery with

Qualifications

  • Extensive software engineering experience in risk management or latency-critical systems.
  • Experience in cash equities electronic trading or algorithmic trading platforms.
  • Proven leadership of engineering teams (onshore/offshore).
  • Strong communication across multicultural, cross-regional stakeholders.

Responsibilities

  • Design, develop and maintain ultra-low-latency risk engine for real-time checks.
  • Architect high-performance, multi-threaded components.
  • Collaborate with traders, quants, and infrastructure teams.
  • Lead testing frameworks and CI/CD for latency systems.
  • Mentor engineers and drive architectural decisions.

Skills

Low-latency Java
C++
Rust
Aeron
Solace
Multi-threading
JVM tuning
NUMA-aware
Kernel tuning
CI/CD
Testing
Leadership
Communication

Tools

Aeron
Solace

Job description

Citigroup Inc. seeks an experienced Senior Software Engineer to own critical latency-sensitive risk-checking components in the cash equities trading hot path.

You will ensure pre-trade risk controls operate with microsecond performance while maintaining correctness and resilience at scale, and mentor engineers across global centers. You will design and implement ultra-low-latency risk engine, IPC frameworks with Aeron/Solace, optimize JVM/C++ performance, and lead cross-functional delivery with

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