Senior IP Logic Design Engineer for 3D NAND

Solidigm; Rancho Cordova (CA); On-site; USD 121,280 - 194,100; Full time

Job summary

A leading memory technology company based in Rancho Cordova, California, is seeking a 3D NAND IP Logic Design Engineer. This role involves architectural design and verification of logic circuits for NAND flash memory, with responsibilities ranging from developing micro-architecture specifications to collaborating on pre- and post-silicon debug cycles. Qualified candidates have an MS in engineering, extensive experience with Verilog/SystemVerilog, and a strong foundation in design verification. The compensation range is $121,280 - $194,100 based on experience.

Qualifications

• 7+ years of experience in a related field.
• Proven expertise in RTL design, logic synthesis, and ECO.
• Strong background in design verification and automation.

Responsibilities

• Architect and design logic and circuit blocks for 3D NAND flash memory.
• Define micro-architecture specifications and implement RTL in SystemVerilog.
• Collaborate with pre-silicon verification teams for tests and simulations.

Skills

Verilog

SystemVerilog

ASIC design flow

Design verification tools

Automation scripting

Education

MS in electrical or computer engineering

BS with 9+ years of experience

Job description

A leading memory technology company based in Rancho Cordova, California, is seeking a 3D NAND IP Logic Design Engineer. This role involves architectural design and verification of logic circuits for NAND flash memory, with responsibilities ranging from developing micro-architecture specifications to collaborating on pre- and post-silicon debug cycles. Qualified candidates have an MS in engineering, extensive experience with Verilog/SystemVerilog, and a strong foundation in design verification. The compensation range is $121,280 - $194,100 based on experience.