Senior High-Speed IO Validation Lead

Nvidia Corporation; Santa Clara (CA); On-site; USD 168,000 - 310,500; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA seeks a senior silicon validation engineer to own post-silicon bring-up, characterization, and debug of HSIO interfaces across GPUs, CPUs, and SoCs. You will trace failures through protocol behavior, signal integrity, firmware, and platform topology, and drive fixes to production readiness.

You'll define validation strategies, build AI-assisted debug flows, and ensure robust interoperability with retimers, switches, accelerators, and multi-device system topologies.

Qualifications

• BS or MS in Electrical Engineering, Computer Engineering, or Systems Engineering, or equivalent experience in the lab.
• 8+ years in silicon validation, HSIO bring-up, or high-speed interface debug on real hardware.
• Deep protocol expertise in PCIe, NVLink, CXL, C2C, Ethernet, USB, or similar high-speed interface technologies.

Responsibilities

• Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness.
• Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation.
• Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria for each program.
• Own and build AI agents that operate under your direction to automate debug triage, data pipelines, and analysis flows.
• Translate what you learn on real silicon into methodology and coverage improvements that make future products harder to escape.

Skills

Silicon validation

HSIO bring-up

High-speed interface debugging

PCIe

CXL

NVLink

C2C

Signal integrity

Statistical analysis

Education

BS or MS in Electrical Engineering or related

Tools

Oscilloscopes

BERTs

Protocol analyzers

Logic analyzers

Exercisers

Job description

NVIDIA seeks a senior silicon validation engineer to own post-silicon bring-up, characterization, and debug of HSIO interfaces across GPUs, CPUs, and SoCs. You will trace failures through protocol behavior, signal integrity, firmware, and platform topology, and drive fixes to production readiness.

You'll define validation strategies, build AI-assisted debug flows, and ensure robust interoperability with retimers, switches, accelerators, and multi-device system topologies.