Senior Hardware Test & Embedded Infra Engineer

Efficient Computer; San Francisco, Pittsburgh, Austin (CA, Allegheny County, TX); On-site; USD 180,000 - 220,000; Full time

Benefits offered by this job

Equity program

401K match

Paid parental leave

Job summary

Efficient Computer in San Francisco is seeking a strong hardware infrastructure engineer to develop and scale ATLAS testing and performance profiling infrastructure. The role spans embedded hardware deployment, Go services, Kubernetes, and Go/C++ server and client development.

You will work with PostgreSQL and Redis, write Python tooling, and optimize power and performance across FPGA, Ambiq, Apollo, PIC32 and Efficient E1 platforms.

Qualifications

• Hands-on embedded hardware and software development experience.
• Bachelor's degree or equivalent practical experience in CS/CE/EE.
• Lead level experience with 5+ years in cloud and embedded infrastructure, test engineering, and full-stack systems.

Responsibilities

• Embedded Hardware Deployment, Maintenance & Troubleshooting.
• Test Program Development in C/C++ across multiple hardware targets.
• Reliability, Observability, and performance improvements for infrastructure.
• Tooling & Automation using Python to drive workflows and dashboards.
• Kubernetes Infrastructure maintenance for hardware-attached worker nodes.
• Server/Client & Database Development using Go with PostgreSQL and Redis.

Skills

Go

C/C++

Python

Kubernetes

PostgreSQL

Redis

Education

Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or related field

Tools

JTAG/SWD debugging tools

Power measurement tools

Hardware-in-the-loop systems

Job description

Efficient Computer in San Francisco is seeking a strong hardware infrastructure engineer to develop and scale ATLAS testing and performance profiling infrastructure. The role spans embedded hardware deployment, Go services, Kubernetes, and Go/C++ server and client development.

You will work with PostgreSQL and Redis, write Python tooling, and optimize power and performance across FPGA, Ambiq, Apollo, PIC32 and Efficient E1 platforms.