Senior Hardware PM for Edge AI & GPNPU SoC

QUADRIC PTY LTD

Burlingame (CA)

Hybrid

USD 200,000 - 250,000

Full time

14 days+
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Benefits offered by this job

Medical Insurance
401(k) Retirement Plan
Paid Parental Leave
Flexible PTO
Catered lunches

Job summary

Quadric in Burlingame, CA is seeking a Senior Product Manager, Hardware to own the Chimera GPNPU IP roadmap across compute, efficiency, scalability, safety, and integration, coordinating with anchor customers worldwide.

You will translate requirements into feature sets, lead architecture reviews with Tier-1 automotive and OEM teams, and drive usability improvements to streamline SoC integration for real-time edge devices slated for 2027 and beyond.

Qualifications

  • 5–8 years PM experience in hardware or silicon.
  • Experience in at least two of: NPU/AI accelerator arch, SoC integration, DSP/vector compute, automotive silicon, or IP licensing.
  • Proven experience leading architecture reviews with sophisticated buyers (Tier-1 automotive, OEM SoC teams).
  • Active adoption of agentic AI tools in daily workflows.
  • EE/CE/CS engineering degree, based in or willing to relocate to the Bay Area (Burlingame hybrid), and willing to travel quarterly.

Responsibilities

  • Translate customer requirements into track-by-track feature lists with explicit gating.
  • Lead trade-off reviews with architects and PSC to bring clear recommendations.
  • Drive IP usability by productizing architectural solutions for easier integration.

Skills

NPU Architecture
SoC Integration
DSP/Vector Compute
Automotive Silicon
IP Licensing
Architecture Reviews

Education

EE/CE/CS degree

Tools

RTL Background

Job description

Quadric in Burlingame, CA is seeking a Senior Product Manager, Hardware to own the Chimera GPNPU IP roadmap across compute, efficiency, scalability, safety, and integration, coordinating with anchor customers worldwide.

You will translate requirements into feature sets, lead architecture reviews with Tier-1 automotive and OEM teams, and drive usability improvements to streamline SoC integration for real-time edge devices slated for 2027 and beyond.

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