Senior Hardware Engineer: High-Speed FA & Root-Cause Analysis

Centraprise, Corp.

San Jose (CA)

On-site

USD 150,000 - 210,000

Full time

43 hours ago
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Job summary

Centraprise, Corp. in San Jose, CA, is seeking a Hardware Engineer for high speed complex hardware design and failure analysis. This is a full-time permanent role based in San Jose.

You will lead end-to-end investigations, plan experimental FA, and drive cross-domain root cause analysis with ASIC, SI, PI, and software teams. You will coordinate with external silicon vendors and OSATs, synthesize failure data into DFR/DFD/DFM requirements, and mentor junior engineers.

Qualifications

  • Bachelor's or Master's in EE/CE/Materials Science or related field.
  • 10+ years of hardware engineering, board design, or system-level failure analysis.
  • PCIe Gen4/5/6, DDR4/5, HBM, 56G/112G/224G SerDes, optical transceivers.
  • Debugging power distribution networks and high-speed SI issues.
  • Experience directing external silicon suppliers and analytical labs.
  • Strong executive communication to cross-functional leaders.

Responsibilities

  • Lead end-to-end technical investigations for field escalations and system failures.
  • Plan experimental FA and direct lab engineers on high-speed boards and multi-chassis tests.
  • Drive cross-domain root cause analysis with ASIC, SI, PI, mechanical/thermal, diagnostics, and software teams.
  • Coordinate with component vendors and OSATs for component-level FA (CSAM, X-Ray, FIB, SEM/EDX, decapsulation, micro-probing).
  • Synthesize field and manufacturing data to drive DFR/DFD/DFM requirements; mentor engineers.

Skills

High-Speed Hardware
Power Integrity
Signal Integrity
Supplier Engagement
Executive Communication

Education

Bachelor's or Master's in EE/CE/Materials Science or related field

Job description

Centraprise, Corp. in San Jose, CA, is seeking a Hardware Engineer for high speed complex hardware design and failure analysis. This is a full-time permanent role based in San Jose.

You will lead end-to-end investigations, plan experimental FA, and drive cross-domain root cause analysis with ASIC, SI, PI, and software teams. You will coordinate with external silicon vendors and OSATs, synthesize failure data into DFR/DFD/DFM requirements, and mentor junior engineers.

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