Senior Hardware Design Engineer

IC Resources; Irvine (CA); Hybrid; USD 140,000 - 190,000; Full time

Job summary

IC Resources is seeking a Senior Hardware Design Engineer in Irvine, CA, offering a hybrid work arrangement. You will work on space-qualified devices, delivering IP solutions and RTL implementations for ASIC/FPGA products.

The role requires expert RTL design experience, strong timing optimization, and proficiency with EDA tools. Bonus points for UVM, C++/SystemC, PCIe/JESD or Python, and the chance to impact global satellite connectivity from orbit.

Qualifications

• Expert level RTL design experience in ASIC and FPGA.
• Strong track record in timing and hardware resource optimization.
• Experience with EDA tools for simulation and synthesis.
• Bonus: UVM, C++/SystemC, high speed interfaces (PCIe, JESD), or Python.

Responsibilities

• Space qualified devices, delivering standalone and integrated IP solutions.
• RTL implementation for complex ASIC/FPGA products.
• Full design flow collaboration: micro architecture, design, verification, physical implementation and optimization.

Skills

RTL design

ASIC/FPGA

Timing optimization

SystemVerilog/Verilog

Tools

EDA tools

Job description

We're hiring: Senior Hardware Design Engineer (Irvine, CA, Hybrid)

Work on technology at the leading edge of non terrestrial communications, a 5G base station built to be deployed on board satellites.

This is deep tech with real world impact: baseband signal processing IP that's already proven in orbit, powering hundreds of operational satellite communications systems worldwide.

What you'll work on:

• Space qualified devices, delivering standalone and integrated IP solutions
• RTL implementation (Verilog/SystemVerilog) for complex ASIC/FPGA products
• Full design flow collaboration: micro architecture, design, verification, physical implementation and optimization

What we're looking for:

• Expert level RTL design experience in ASIC and FPGA
• Strong track record in timing and hardware resource optimization
• Experience with EDA tools for simulation and synthesis
• Bonus points for UVM, C++/SystemC, high speed interfaces (PCI E, JESD), or Python

If you want to work on technology that's shaping the future of global connectivity from orbit, not just talk about it, this is a rare seat.

Permanent, hybrid, Irvine, CA.