Senior Hardware Architect – Embedded Systems & High-Speed Boards

Axiado Corporation; San Jose (CA); On-site; USD 140,000 - 190,000; Full time

Job summary

Axiado Corporation in the heart of Silicon Valley seeks a Senior Hardware Engineer to drive products from concept to production. You will design embedded computing hardware, capture schematics, develop tests, and collaborate with layout, mechanical, and SI teams.

Bring-up and validation in the lab, plus cross-functional technical discussions, are core to the role. Required hands-on hardware design experience, familiarity with Cadence Orcad/Allegro, high-speed interfaces, and server architectures

Qualifications

• Hands-on hardware design and schematic capture.
• PCB layout and signal integrity analysis.
• Familiarity with I2C, SMBUS, SPI, UART, USB interfaces.
• Experience with PCIe and memory interfaces (DDR4/5).
• DC-DC converter design knowledge.
• Experience with x86/Arm server architectures.

Responsibilities

• Drive product from concept to production.
• Be actively involved in system design on embedded computing system products.
• Create hardware specs and develop test plans.
• Capture Schematics using Orcad.
• Work with Layout, Mechanical and SI engineers to complete the designs.
• Bring up systems and execute engineering validation in the lab.
• Interact with cross-functional teams for technical discussions.
• Address challenging problems and issues.
• Ability to work on multiple tasks concurrently.
• Engage and drive HW builds and procurement.

Skills

Board design

Schematic capture

PCB layout

Signal integrity

Cadence Orcad

Allegro

I2C/SPI/UART/USB interfaces

PCIe DDR4/5

DC-DC converter design

x86/Arm servers

Lab bring-up

Debugging

Linux scripting

Tools

Cadence Orcad

Allegro

Job description

Axiado Corporation in the heart of Silicon Valley seeks a Senior Hardware Engineer to drive products from concept to production. You will design embedded computing hardware, capture schematics, develop tests, and collaborate with layout, mechanical, and SI teams.

Bring-up and validation in the lab, plus cross-functional technical discussions, are core to the role. Required hands-on hardware design experience, familiarity with Cadence Orcad/Allegro, high-speed interfaces, and server architectures