Senior Front-End RTL Engineer for Wafer-Scale AI

Cerebras; Sunnyvale (CA); On-site; USD 250,000 - 300,000; Full time

Job summary

Cerebras is seeking a Senior Front-End Design Engineer to join their team in Sunnyvale, CA. As a key member, you will design and develop the next generation of the Cerebras Wafer Scale Engine, focusing on high-performance, power-efficient solutions.

The ideal candidate will have a Master’s degree in Computer Science or Electrical Engineering and over 8 years of related experience. The company offers a competitive annual salary ranging from $250,000 to $300,000, alongside a commitment to diversity and inclusion.

Qualifications

• 8+ years of experience in delivering complex RTL designs.
• Experience with front-end chip integration and third-party IP.
• Demonstrated successes in silicon projects.

Responsibilities

• Drive all aspects of chip design including specification and RTL development.
• Collaborate during design closure to meet performance goals.
• Debug silicon-level issues during bring-up.

Skills

RTL design

Chip integration

Networking

High-performance computing

Machine learning

Python

TCL

Education

Master’s degree in Computer Science or Electrical Engineering

Tools

FPGA development toolchain

Scripting tools

Job description

Cerebras is seeking a Senior Front-End Design Engineer to join their team in Sunnyvale, CA. As a key member, you will design and develop the next generation of the Cerebras Wafer Scale Engine, focusing on high-performance, power-efficient solutions.

The ideal candidate will have a Master’s degree in Computer Science or Electrical Engineering and over 8 years of related experience. The company offers a competitive annual salary ranging from $250,000 to $300,000, alongside a commitment to diversity and inclusion.