Senior RTL Design Engineer - High-Performance AI Chip

Cerebras Systems, Inc.; Sunnyvale (CA); Hybrid; USD 175,000 - 275,000; Full time

Job summary

Cerebras Systems, Inc. in Sunnyvale, California is seeking a lead front-end design engineer to design and develop the next generation of the Cerebras Wafer Scale Engine. Candidates must have a Master’s degree, extensive experience in RTL design, and the ability to manage external vendors.

This role offers a competitive salary range from $175,000 to $275,000, alongside opportunities for bonuses and equity. Join a pioneering team dedicated to transforming AI at scale.

Qualifications

• 8-15 years of experience in delivering complex, high-performance RTL designs.
• Experience with front-end chip integration and high-speed IO.
• Knowledge of networking including TCP/IP and Ethernet.

Responsibilities

• Drive all aspects of chip design including Functional Specification and RTL development.
• Manage external ASIC vendor through the product development cycle.
• Work closely with software and system teams for performance optimization.

Skills

RTL design expertise

High-performance computing

Networking stack knowledge

Scripting tools: Python, TCL

Collaboration with external vendors

Education

Master’s degree in Computer Science or Electrical Engineering

Tools

FPGA development toolchain

Job description

Cerebras Systems, Inc. in Sunnyvale, California is seeking a lead front-end design engineer to design and develop the next generation of the Cerebras Wafer Scale Engine. Candidates must have a Master’s degree, extensive experience in RTL design, and the ability to manage external vendors.

This role offers a competitive salary range from $175,000 to $275,000, alongside opportunities for bonuses and equity. Join a pioneering team dedicated to transforming AI at scale.