Senior FPGA Verification Engineer - RTL Test Lead

Anduril Industries

Boulder (CO)

On-site

USD 165,000 - 218,000

Full time

14 days+

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Benefits offered by this job

Equity grants
Top-tier benefits

Job summary

Anduril Industries is seeking a Senior FPGA Verification Engineer to help design new product lines. You will work with a cross-functional team to define, develop, and verify FPGA/ASIC designs, moving prototypes through ground and flight testing toward production.

The role emphasizes SystemVerilog/UVM verification, RTL testbench development, and leadership across project verification activities. A Secret clearance eligibility is required.

Qualifications

  • ABachelor’s in Electrical Engineering, Computer Engineering, or related field is typically required.
  • 8+ years of HDL firmware development for FPGA devices.
  • Experience with RTL design simulation using VHDL/Verilog in FPGA/ASIC environments.
  • Proven ability to design and execute verification testbenches for RTL blocks.

Responsibilities

  • Design verification environment architecture using SystemVerilog and UVM/OVM.
  • Create test plans, test cases, and coverage metrics.
  • Develop testbenches for RTL blocks in VHDL or SystemVerilog.
  • Suggest new tools and practices to improve the FPGA/ASIC verification flow.
  • Contribute engineering estimates and provide technical leadership to project teams.
  • Collaborate with interdisciplinary teams to advance prototypes toward production.

Skills

HDL firmware
VHDL/Verilog
SystemVerilog
UVM/OVM
RTL verification
Testbench design

Education

Bachelor's in Electrical/Computer Engineering

Tools

QuestaSim
Synplify
Quartus
Vivado

Job description

Anduril Industries is seeking a Senior FPGA Verification Engineer to help design new product lines. You will work with a cross-functional team to define, develop, and verify FPGA/ASIC designs, moving prototypes through ground and flight testing toward production.

The role emphasizes SystemVerilog/UVM verification, RTL testbench development, and leadership across project verification activities. A Secret clearance eligibility is required.

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