Senior FPGA Verification Engineer

Anduril Industries

Waltham (MA)

On-site

USD 191,000 - 253,000

Full time

14 days+

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Benefits offered by this job

Equity grants
Competitive benefits
Top-tier compensation

Job summary

Anduril Industries is seeking a Senior FPGA Verification Engineer to help design new product lines. You will collaborate with an interdisciplinary team to define, build, and mature prototypes into flight-ready products.

The role requires extensive HDL/RTL expertise (VHDL/Verilog) for FPGA/ASIC verification, plus leadership in verification activities and testbench development. Eligible for a U.S. Secret clearance.

Qualifications

  • Requires a Bachelors in Electrical or Computer Engineering or related field.
  • 8+ years of HDL firmware experience for FPGA devices.
  • Experience with RTL design, VHDL/Verilog in FPGA/ASIC environments.
  • Ability to develop and simulate RTL verification testbenches.
  • Knowledge of chip-level verification methods and version control (Git).
  • Eligible to obtain and maintain an active U.S. Secret clearance.

Responsibilities

  • Design and verify verification environment architecture using SystemVerilog/OVM/UVM.
  • Create test plans, test cases, and coverage tracking for RTL blocks.
  • Develop testbenches for RTL with VHDL/SystemVerilog.
  • Suggest tools and practices to improve FPGA verification flow.
  • Contribute engineering estimates for new programs and provide technical leadership.

Skills

SystemVerilog
VHDL
RTL design
Testbench development
Git

Education

Bachelor's in Electrical Engineering or related

Tools

QuestaSim
Synplify
Quartus
Vivado
Linux

Job description

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century’s most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril’s family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years.

ABOUT THE TEAM

The Anduril Imaging team developsstate-of-the-artimaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies.The team is heavily involved inutilizingcomputer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage.

ABOUT THE JOB

The Imaging team is seeking a Senior FPGA Verification Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products.

WHAT YOU’LL DO
  • Verification environment architecture and design usingtools likeSystemVerilogorOVM/UVM
  • Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking
  • Testbench development for the verification of RTL blocks using VHDL orSystemVerilog
  • Recommend new tools and practices for continuous improvement in the group’s ASIC / FPGA verification flow
  • Contribute to engineering estimates for new program pursuits.
  • Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
REQUIRED QUALIFICATIONS
  • ABachelor’s in Electrical Engineering, Computer Engineering, or a related technical field is typicallyrequired.
  • 8+ years of experience developing HDL firmware for FPGA devices
  • Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
  • experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
  • Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/orSystemVerilog.
  • experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
  • Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, andmaintainconfiguration integrity.
  • Eligible to obtain andmaintainan active U.S. Secret security clearance
PREFERRED QUALIFICATIONS
  • Experience with ASIC/FPGA lab validation and debug using standard lab equipment, along with familiarity with DFT, manufacturability, and production test concepts.
  • Proficiencywith Unix/Linux environments,scriptingor software development (C, C++, Python, Perl, or shell), and industry-standard ASIC/FPGA simulation and synthesis tools such asQuestaSim,Synplify, Quartus, orVivado.

US Salary Range

$191,000—$253,000 USD

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril’s total compensation package. Additionally, Anduril offers top-tier benefits for full‑time employees, including:

Benefits

At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you’re supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits.

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