Senior FPGA Program Manager — Global Delivery Leader

Altera Corporation; San Jose (CA); Hybrid; USD 167,000 - 242,000; Full time

Job summary

Altera Corporation is seeking a Senior Technical Program Manager in San Jose, CA to orchestrate cross-functional engineering execution for next-generation FPGA devices. You will manage silicon, IP, software, firmware, validation, and manufacturing readiness with globally distributed teams, driving schedules, risks, and executive reporting.

Ideal candidates bring 10+ years in TPM or engineering leadership, strong HW/SW interactions, and proven post-silicon experience through bring-up and

Qualifications

• 10+ years of technical program management or engineering leadership experience.
• 8+ years coordinating cross-functional hardware/software development across silicon, firmware, IP, DV.
• Strong HW/FW/SW interaction knowledge enabling engagement across RTL and DV.
• Experience with pre- and post-silicon phases including validation and bring-up.
• Proven leadership across full product lifecycle and multi-organization programs.
• 7+ years leading geographically distributed teams.

Responsibilities

• Lead large, complex programs from definition through production rollout.
• Coordinate across silicon, IP, software, firmware, validation, and manufacturing readiness.
• Develop detailed plans, milestones, and dependency tracking.
• Mitigate risks and ensure on-time delivery.
• Provide executive-level status updates and data-driven decisions.

Education

Bachelor’s degree in Electrical Engineering, Software Engineering, Computer Engineering, or related technical discipline

Job description

Altera Corporation is seeking a Senior Technical Program Manager in San Jose, CA to orchestrate cross-functional engineering execution for next-generation FPGA devices. You will manage silicon, IP, software, firmware, validation, and manufacturing readiness with globally distributed teams, driving schedules, risks, and executive reporting.

Ideal candidates bring 10+ years in TPM or engineering leadership, strong HW/SW interactions, and proven post-silicon experience through bring-up and