Senior Technical Program Manager

Altera Corporation; San Jose (CA); Hybrid; USD 167,000 - 242,000; Full time

Job summary

Altera Corporation is seeking a Senior Technical Program Manager in San Jose, CA to orchestrate cross-functional engineering execution for next-generation FPGA devices. You will manage silicon, IP, software, firmware, validation, and manufacturing readiness with globally distributed teams, driving schedules, risks, and executive reporting.

Ideal candidates bring 10+ years in TPM or engineering leadership, strong HW/SW interactions, and proven post-silicon experience through bring-up and

Qualifications

• 10+ years of technical program management or engineering leadership experience.
• 8+ years coordinating cross-functional hardware/software development across silicon, firmware, IP, DV.
• Strong HW/FW/SW interaction knowledge enabling engagement across RTL and DV.
• Experience with pre- and post-silicon phases including validation and bring-up.
• Proven leadership across full product lifecycle and multi-organization programs.
• 7+ years leading geographically distributed teams.

Responsibilities

• Lead large, complex programs from definition through production rollout.
• Coordinate across silicon, IP, software, firmware, validation, and manufacturing readiness.
• Develop detailed plans, milestones, and dependency tracking.
• Mitigate risks and ensure on-time delivery.
• Provide executive-level status updates and data-driven decisions.

Education

Bachelor’s degree in Electrical Engineering, Software Engineering, Computer Engineering, or related technical discipline

Job description

## Senior Technical Program ManagerApply: San Jose, California, United States: Full time: Posted Today: R03296# **Job Details:**### ## **Job Description:****About the Role**Altera is seeking a **Senior Technical Program Manager** to coordinate and drive the engineering execution behind next-generation FPGA device rollouts. In this highly cross-functional role, you will orchestrate complex development efforts spanning silicon, IP, software, firmware, validation, and manufacturing readiness, ensuring alignment across geographically distributed teams in North America and Asia. You will implement best-in-class program management practices, drive schedule and risk transparency, and ensure successful delivery of industry-leading FPGA products. **Responsibilities*** Lead and manage large, complex technical programs supporting FPGA device development from definition through production rollout.* Coordinate execution across multiple engineering disciplines including silicon design, IP, software, firmware, validation, and system enablement.* Develop and maintain detailed program plans, schedules, milestones, and dependency tracking for multi-threaded development efforts.* Drive alignment across global teams in North America and Asia, ensuring clear ownership, accountability, and communication.* Identify program risks, critical path issues, and resource constraints; proactively develop and execute mitigation plans.* Partner closely with engineering, product management, quality, and operations teams to ensure on-time, high-quality delivery.* Implement and continuously improve best-in-class project and program management processes, tools, and reporting mechanisms.* Facilitate executive-level communication by providing clear status updates, issue escalation, and data-driven decision support.* Support silicon bring-up, validation, sampling, and production readiness milestones by ensuring cross-functional execution alignment. **Salary Range**The pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance. **$166,900 - $241,675 USD** We use artificial intelligence to screen, assess, or select applicants for the position. Applicants must be eligible for any required U.S. export authorizations. #LI-MD1### ## **Qualifications:****Minimum Qualifications*** Bachelor’s degree in Electrical Engineering, Software Engineering, Computer Engineering, or a related technical discipline, with **10+ years of experience** in Technical Program Management, Program Management, or Engineering Program Leadership roles.* **8+ years of experience** managing complex, cross-functional hardware and software development programs, including coordination across silicon, hardware, software, firmware, IP, design verification, and validation teams.* **Strong silicon or hardware design domain expertise** with a solid understanding of **HW/FW/SW interactions**, enabling effective engagement across RTL, design verification (DV), system, and other engineering disciplines.* **Proven experience across pre- and post-silicon development phases**, including validation, silicon bring-up, and debug, with a strong understanding of end-to-end hardware development, associated risks, and technical trade-offs.* **Demonstrated leadership across the full Product Lifecycle (PLC)**, with the ability to translate technical complexity into structured execution plans, manage dependencies and critical paths, align cross-functional stakeholders, and resolve integration challenges.* **7+ years of experience leading programs across multiple organizations and geographically distributed international teams**, with demonstrated ability to drive accountability, manage program risks and resource constraints, communicate effectively with senior stakeholders, and influence teams without direct authority. **Preferred Qualifications*** 5+ years of technical experience in one or more of the following areas: **Transceivers, Embedded Systems (particularly ARM), Config and Security, PCIe, Ethernet, or ASIC Design / Design Verification (DV).*** 5+ years of experience working directly on FPGA, ASIC, or silicon-based product development programs.* Hands-on technical background in silicon design, validation, or software/firmware engineering.* Experience supporting silicon bring-up, validation, debug, or manufacturing readiness phases.* Familiarity with Agile, hybrid Agile/Waterfall, or scaled execution frameworks in hardware-centric environments.* Experience presenting program status, execution metrics, risks, and technical trade-offs to senior leadership and executive stakeholders.### ## **Job Type:**Regular### ## **Shift:**Shift 1 (United States of America)### ## **Primary Location:**San Jose, California, United States### ## **Additional Locations:**### ## **Posting Statement:**All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.