Senior FPGA Engineer - Avionics & DO-254 Focus

Collins Aerospace

Melbourne (FL)

On-site

USD 87,000 - 165,000

Full time

14 days+

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Benefits offered by this job

Medical, dental, and vision insurance
Three weeks of vacation per year
Generous 401(k) plan with employer匹配

Job summary

Collins Aerospace in Melbourne, FL seeks a Senior Electrical Engineer - FPGA to partner with Avionics teams across the product lifecycle. You will capture requirements, decompose architectures, and develop RTL for ASIC/FPGA/MPSoC with testbenches in VHDL/Verilog/SystemVerilog.

Travel up to 10% and mentorship of junior engineers are expected. The role requires a STEM degree with 5+ years of experience (or an advanced degree with 3+ years), U.S.

Qualifications

  • Degree in Science, Technology, Engineering or Mathematics (STEM) with 5+ years of relevant experience, or an advanced degree with 3+ years.
  • U.S. Person required for ITAR access to information/hardware.
  • Experience writing RTL and test benches using VHDL, Verilog, SystemVerilog.
  • Experience with FPGA tools: Questasim, Vivado, Libero, Synplify Pro and data interfaces (PCIe, DDR, I2C, Ethernet, ARINC-429).
  • Linux/Unix, scripting, C/C++, Python and/or Perl experience.

Responsibilities

  • Capture requirements, decompose, traceability across the development lifecycle.
  • Design ASIC/FPGA/MPSoC architectures and RTL.
  • Develop RTL and test benches in VHDL/Verilog/SystemVerilog.
  • Create verification testbenches and constrained random environments.
  • Perform synthesis, place & route and timing analysis.
  • Lead FAA DO-254/ DAL-A/B/C artifacts as applicable.
  • Mentor engineers and participate in peer reviews and audits.

Skills

RTL coding
VHDL
Verilog
SystemVerilog
FPGA tools
C/C++
Python
Linux

Education

STEM degree (or advanced degree)

Tools

Questasim
Vivado
Libero
Synplify Pro

Job description

Collins Aerospace in Melbourne, FL seeks a Senior Electrical Engineer - FPGA to partner with Avionics teams across the product lifecycle. You will capture requirements, decompose architectures, and develop RTL for ASIC/FPGA/MPSoC with testbenches in VHDL/Verilog/SystemVerilog.

Travel up to 10% and mentorship of junior engineers are expected. The role requires a STEM degree with 5+ years of experience (or an advanced degree with 3+ years), U.S.

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