Senior FPGA Engineer - AI-Driven Defense Tech

Telemetry Today LLC

Costa Mesa, Northern (CA, KY)

Hybrid

USD 166,000 - 220,000

Full time

2 days ago
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Job summary

Anduril Industries is seeking an experienced FPGA/embedded systems engineer in the United States to design, implement, and verify FPGA-based solutions for military-grade communications and networking.

Responsibilities include leading the firmware lifecycle from MATLAB/Simulink to hardware, establishing HDL workflows, and developing FPGA-to-data-handling interfaces. Will require cross-functional collaboration and active security clearance.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Science, or equivalent.
  • 6+ years of FPGA-based systems design using VHDL or Verilog.
  • Experience translating MATLAB/Simulink algorithms to FPGA implementations.
  • Proficiency in C and C++.
  • Experience with RTOS.
  • Familiarity with Ethernet, I2C, SPI, PCIe, USB interfaces.
  • Eligibility to obtain active U.S. Secret security clearance.

Responsibilities

  • Collaborate with cross-functional hardware/embedded teams to deliver robust FPGA-based solutions.
  • Lead FPGA firmware development lifecycle from MATLAB/Simulink algorithms to hardware implementations on FPGAs/SoCs.
  • Establish and optimize HDL firmware workflows across architecture, verification, and testing.
  • Develop microprocessor ICDs between FPGA and data handling schemes.

Skills

C/C++
VHDL/Verilog
RTOS
Networking interfaces
Flight software
Security clearance
MATLAB/Simulink

Education

Bachelor's degree in Electrical Engineering, Computer Science, or equivalent

Tools

Oscilloscopes
Spectrum Analyzers
Signal Generators

Job description

Anduril Industries is seeking an experienced FPGA/embedded systems engineer in the United States to design, implement, and verify FPGA-based solutions for military-grade communications and networking.

Responsibilities include leading the firmware lifecycle from MATLAB/Simulink to hardware, establishing HDL workflows, and developing FPGA-to-data-handling interfaces. Will require cross-functional collaboration and active security clearance.

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