Senior FPGA DSP Architect for National Security

KBR Careers

Beavercreek Township (OH)

On-site

USD 160,000 - 210,000

Full time

9 days ago
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Job summary

KBR is seeking a Senior FPGA Engineer to lead FPGA DSP architectures for advanced communications and RF systems. You will drive FPGA logic across SDR platforms, implement real-time DSP algorithms, and integrate with embedded processors.

The ideal candidate has 8+ years in FPGA/DSP, VHDL/Verilog proficiency, and experience with AXI, Vivado, and Linux in a collaborative, mission-focused environment.

Qualifications

  • Bachelor’s degree in Electrical or Computer Engineering required.
  • 8+ years of FPGA, DSP, or RF signal processing experience.
  • Proficiency in VHDL and/or Verilog.
  • Experience with FPGA devices from AMD or major vendors.
  • Experience with Vivado or similar toolchains.
  • Familiarity with AXI-based architectures.
  • Strong DSP fundamentals: sampling, filtering, FFTs.

Responsibilities

  • Design, implement, and maintain FPGA-based DSP architectures for advanced communications and RF systems.
  • Lead FPGA logic development and integration across SDR platforms.
  • Implement and debug real-time DSP algorithms in hardware (filters, FFTs, modulation).
  • Integrate FPGA with embedded processors and peripherals using AXI.
  • Develop software/firmware to command FPGA modules and testbenches.
  • Perform lab bring-up, testing, and debugging with RF/digital test equipment.
  • Create verification workflows and simulations for timing and functionality.

Skills

VHDL
Verilog
FPGA design
DSP
AXI
Linux
Git
C/C++
SDR
DSP algorithms

Education

Bachelor’s degree in Electrical or Computer Engineering
Master’s or PhD (preferred)

Tools

Vivado

Job description

KBR is seeking a Senior FPGA Engineer to lead FPGA DSP architectures for advanced communications and RF systems. You will drive FPGA logic across SDR platforms, implement real-time DSP algorithms, and integrate with embedded processors.

The ideal candidate has 8+ years in FPGA/DSP, VHDL/Verilog proficiency, and experience with AXI, Vivado, and Linux in a collaborative, mission-focused environment.

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