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Actalent in Greenville, SC is seeking a Senior FPGA Design Engineer to lead development, verification, and optimization of high-speed FPGA solutions. You will own RTL design using Verilog/VHDL/SystemVerilog and collaborate with hardware and software teams across the board.
This on-site contract-to-hire role offers exposure to PCIe Gen4/5, 10–100G Ethernet, DDR4/DDR5, and advanced test benches, with mentorship of junior engineers and a focus on reliability standards.
Actalent in Greenville, SC is seeking a Senior FPGA Design Engineer to lead development, verification, and optimization of high-speed FPGA solutions. You will own RTL design using Verilog/VHDL/SystemVerilog and collaborate with hardware and software teams across the board.
This on-site contract-to-hire role offers exposure to PCIe Gen4/5, 10–100G Ethernet, DDR4/DDR5, and advanced test benches, with mentorship of junior engineers and a focus on reliability standards.