Senior FPGA Architect: NoC, IP & SoC Innovation

191 Altera Corporation; San Jose (CA); On-site; USD 149,000 - 215,000; Full time

Job summary

Altera is seeking a Senior FPGA Silicon Design Engineer to own significant portions of FPGA architecture and implementation. You will develop core fabric logic, interconnect, clocks, and NoC blocks while mentoring engineers and collaborating with cross‑functional teams.

You will model, simulate, and verify complex FPGA circuits, optimize for power, performance, and yield, and contribute to scalable design methodologies for future FPGA generations.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, Physics, Math, or related field; 8+ years of FPGA/ASIC experience.
• 8+ years in FPGA circuit, IP, or RTL design; microarchitecture and logic design for complex digital systems.
• 8+ years using FPGA/ASIC design tools and flows; timing, power, area optimization.
• Experience with NoC architectures, interconnect, routing, clocking, and memory structures.

Responsibilities

• Design and develop complex FPGA circuits and IP, including core fabric logic, interconnect, routing, clocking, and NoC architectures.
• Lead microarchitecture definition and perform circuit/logic design for complex FPGA blocks and subsystems.
• Develop schematics, RTL implementations, behavioral models, and simulations for FPGA architectures.
• Perform functional and reliability verification of FPGA circuits and IP with cross‑functional teams.
• Drive improvements in design methodologies to improve PPA and scalability.

Skills

FPGA design

RTL design

NoC architectures

Power/performance optimization

Education

Bachelor's degree in Electrical/Computer Engineering or related field

Tools

FPGA design tools

Schematic/HDL tooling

Job description

Altera is seeking a Senior FPGA Silicon Design Engineer to own significant portions of FPGA architecture and implementation. You will develop core fabric logic, interconnect, clocks, and NoC blocks while mentoring engineers and collaborating with cross‑functional teams.

You will model, simulate, and verify complex FPGA circuits, optimize for power, performance, and yield, and contribute to scalable design methodologies for future FPGA generations.