Senior EMIR Power Signoff Engineer

Pentangle Tech Services | P5 Group; Irvine (CA); On-site; USD 140,000 - 200,000; Full time

Job summary

Pentangle Tech Services | P5 Group seeks a senior EMIR power analyst to develop and support block and top-level power analysis flows for Samsung GPU IP. You will tackle static and dynamic IR drop, vector-less analysis, EMIR, and effective resistance, interfacing with CAD teams and EDA vendors.

Strong Tcl/Python skills, Verilog/DEF familiarity, and a track record of successful tape-outs are essential for this role based in Irvine, CA.

Qualifications

• 5+ years EMIR experience in SOC/ASIC/GPU/CPU design flows.
• Tape-out track record and experience with power integrity flows.
• Strong scripting in Tcl, Shell, Python; read/write Verilog/DEF.
• Experience with 16nm FinFET or smaller process nodes.

Responsibilities

• Develop and support static, vector-less IR drop analysis solutions.
• Develop and support dynamic IR drop analysis for vector and vector-less cases.
• Develop and support signal electro-migration analysis solutions.
• Develop and support effective resistance analysis solutions.
• Collaborate with EDA vendors, power network planners, and design leads to meet milestones.
• Participate in CAD, signoff flows, power network creation in top/block environments.

Skills

EMIR analysis

Tcl scripting

Python scripting

Verilog

DEF

Block-level design

Full-chip implementation

P&R/STA flows

16nm FinFET

Cross-functional collaboration

Education

BSEE / Computer Engineer

Tools

P&R/STA tools

Verilog/DEF reading

Job description

Pentangle Tech Services | P5 Group seeks a senior EMIR power analyst to develop and support block and top-level power analysis flows for Samsung GPU IP. You will tackle static and dynamic IR drop, vector-less analysis, EMIR, and effective resistance, interfacing with CAD teams and EDA vendors.

Strong Tcl/Python skills, Verilog/DEF familiarity, and a track record of successful tape-outs are essential for this role based in Irvine, CA.