Senior DSP Systems Engineer - Satellite Communications

The Adecco Group; El Segundo (CA); On-site; USD 268,632,000 - 289,296,000; Full time

Benefits offered by this job

Direct deposit

401(k) plan

Paid holidays

Skills training

Job summary

PDS Defense, Inc. in El Segundo, CA is seeking a Systems Engineer 4 to design and develop space-based satellite communication systems. You will lead a team and interface with customers, suppliers, and program management to deliver complex payloads.

Candidates should have 9+ years in digital communications and DSP, strong MATLAB/Simulink skills, and hands-on FPGA/ASIC exposure. A BS in engineering is required; advanced degrees are a plus. Security requirements vary by program.

Qualifications

• Bachelor's degree in engineering, engineering technology, physics, math, or computer science.
• 3+ years of experience with core digital communications and signal processing theory.
• 3+ years of experience with MATLAB or Simulink; 1+ year with FPGAs/ASICs.

Responsibilities

• Designing and developing next generation RF and digital satellite communication systems.
• Developing and verifying multi-rate, fixed-point signal processing algorithms.
• Conducting performance analysis of signal processing models.
• Performing waveform development and characterization.
• Leading teams and contributing to HDL-level design and verification.
• Supporting integration and test of payloads and spacecraft.

Skills

DSP algorithms & DSP theory

Systems engineering

Team leadership

Education

Bachelor of Science in Engineering or related field

Advanced degree (MS/PhD) preferred

Tools

MATLAB/Simulink

FPGA/ASIC development

Job description

PDS Defense, Inc. in El Segundo, CA is seeking a Systems Engineer 4 to design and develop space-based satellite communication systems. You will lead a team and interface with customers, suppliers, and program management to deliver complex payloads.

Candidates should have 9+ years in digital communications and DSP, strong MATLAB/Simulink skills, and hands-on FPGA/ASIC exposure. A BS in engineering is required; advanced degrees are a plus. Security requirements vary by program.