Senior Digital Verification Engineer – Chiplet Startup

Eliyan; Washington; On-site; USD 160,000 - 220,000; Full time

Job summary

Eliyan is seeking a staff digital verification engineer to join a fast-growing chiplet startup. You will design and implement state-of-the-art testbenches and unit/chip-level test cases for high-performance PHYs and controllers, driving CI/CD and regression workflows with a hands-on leadership role.

You will collaborate with cross-functional teams, stay ahead of industry trends, and contribute to designs that prioritize power, area, manufacturability, and flexibility for scalable chiplet-based

Qualifications

• Master's or PhD in Electrical Engineering with 6+ years of experience.
• Hands-on verification of serial transmission protocols (Ethernet 100G/200G/400G/800G) and related products.
• Strong expertise in SystemVerilog, UVM, test environments, and assertion coding.

Responsibilities

• Develop and execute verification plans for connectivity IPs and Chiplets.
• Create and maintain SystemVerilog/UVM-based verification environments.
• Write and debug SystemVerilog/UVM test cases for block and chip level verification.
• Maintain a regression environment to enable design CI/CD pipelines.
• Collaborate with design engineers to ensure design quality with continuous architecture, test-plan, and coverage reviews.
• Develop and maintain DPI-based firmware simulation environments and GLS environments for simulations.

Skills

SystemVerilog

UVM

Test environments

Regression tools

Ethernet 802.3 knowledge

Education

Master's or PhD in Electrical Engineering

Tools

Regression management tools

Coverage analysis tools

Job description

Eliyan is seeking a staff digital verification engineer to join a fast-growing chiplet startup. You will design and implement state-of-the-art testbenches and unit/chip-level test cases for high-performance PHYs and controllers, driving CI/CD and regression workflows with a hands-on leadership role.

You will collaborate with cross-functional teams, stay ahead of industry trends, and contribute to designs that prioritize power, area, manufacturability, and flexibility for scalable chiplet-based