Senior Chiplet Verification Engineer — Powering Next‑Gen SoCs

Eliyan Corporation; San Francisco (CA); On-site; USD 180,000 - 260,000; Full time

Benefits offered by this job

Excellent benefits

Fun work environment

Job summary

Eliyan Corporation, a leading chiplet startup in San Francisco, seeks a staff digital verification engineer to develop state‑of‑the‑art testbenches for high‑speed IPs and chiplets. You will lead verification efforts, drive CI/CD‑aligned regression, and collaborate across design and engineering teams in a fast‑paced environment.

The role emphasizes SystemVerilog/UVM expert performance, Ethernet 802.3 compliance, and a startup mindset with a passion for innovation and quality.

Qualifications

• Masters or Ph.D in Electrical Engineering with 6+ years of experience.
• Hands-on verification of serial transmission protocols (Ethernet 100G/200G/400G/800G).
• Strong expertise in UVM, SystemVerilog test environments and assertions.
• Experience with 3rd party tools for regression management and coverage analysis.
• Experience verifying Ethernet 802.3 clauses related to high-speed standards (100G+).
• Knowledge of DRAM Controllers/PHYs and HBM memory is a plus.
• Startup mindset with cross-functional collaboration.

Responsibilities

• Develop and execute verification plans for connectivity IPs and Chiplets.
• Create and maintain SystemVerilog/UVM-based verification environments.
• Write and debug SystemVerilog/UVM compliant test cases for block and chip level.
• Maintain a regression environment enabling design CI/CD pipelines.
• Collaborate with design engineers to ensure design quality with continuous microarchitecture, test‑plan, and coverage reviews.
• Develop, maintain, and track various test plan items and progress towards RTL freeze.
• Stay up to date with industry trends, emerging technologies and standards bodies.
• Ensure IP compliance with Ethernet standards (IEEE 802.3).
• Integration 3rd party VIPs and coordinate feature/bug tracking requests.
• Perform in the capacity of a technical leader for junior verification engineers.
• Create, improve, maintain DPI based FW simulation environments.
• Create, improve, maintain GLS environments for functional and power simulations.

Skills

SystemVerilog

UVM

Testbench development

Regression tools

Ethernet 802.3 knowledge

Python scripting

Education

Master’s or PhD in Electrical Engineering

Job description

Eliyan Corporation, a leading chiplet startup in San Francisco, seeks a staff digital verification engineer to develop state‑of‑the‑art testbenches for high‑speed IPs and chiplets. You will lead verification efforts, drive CI/CD‑aligned regression, and collaborate across design and engineering teams in a fast‑paced environment.

The role emphasizes SystemVerilog/UVM expert performance, Ethernet 802.3 compliance, and a startup mindset with a passion for innovation and quality.