Senior Digital RTL Design Lead for Power Management ICs

Renesas Electronics Corp.; Austin (TX); On-site; USD 130,000 - 170,000; Full time

Job summary

Renesas Electronics Corp. seeks an experienced digital design lead to develop, debug, and verify digital designs in pre- and post-silicon environments. You will write tests, automate flows via scripts, and manage design blocks from requirements to implementation, mentoring juniors along the way.

The role emphasizes strong SystemVerilog debugging, mixed-signal handling, and collaboration with tool flows from Cadence or Synopsys.

Qualifications

• BSc/MSc in Electrical Engineering/Computer Engineering with 10+ years of relevant industry experience.
• Experience in collaborative and innovative design projects.
• Comfortable debugging mixed-signal designs in SystemVerilog test benches.
• Exposure to gate-level simulation debug and strong analytical skills.
• Proficiency with Cadence or Synopsys design tool flows.
• Hands-on technical leadership resulting in successful projects.

Responsibilities

• Develop, debug, and verify digital designs in pre and post-silicon environments.
• Write tests to verify bulk design intent per specifications.
• Learn, develop and improve scripts to facilitate design automation flows.
• Manage assigned design blocks in requirements, architecture, and implementation.
• Research and present new tools to aid the design development process.
• Act as technical mentor for junior engineers and lead design projects.

Skills

Python

Perl

SystemVerilog

Debugging

Digital design

Scripting

Education

BSc/MSc in Electrical Engineering/Computer Engineering

Tools

Cadence

Synopsys

Job description

Renesas Electronics Corp. seeks an experienced digital design lead to develop, debug, and verify digital designs in pre- and post-silicon environments. You will write tests, automate flows via scripts, and manage design blocks from requirements to implementation, mentoring juniors along the way.

The role emphasizes strong SystemVerilog debugging, mixed-signal handling, and collaboration with tool flows from Cadence or Synopsys.