Senior Digital IC Design Engineer - PCIe Expert

Broadcom; San Jose (CA); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Discretionary annual bonus

Equity grant

401(k) with company match

Employee Stock Purchase Program (ESPP)

Paid holidays, sick leave, and PTO

Job summary

Broadcom is seeking a Digital IC Design Engineer to join the Data Center Solutions Group. You will work on RTL designs using Verilog/SystemVerilog for PCIe Switch products and enterprise storage, driving timing closure and high performance in mega datacenters.

Responsibilities include architecture analysis, micro-architecture development, RTL implementation, and debugging. Collaboration with Verification, Software/Firmware, Emulation, and Validation teams is essential.

Qualifications

• Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or equivalent Engineering degree.
• 12+ years of relevant industry experience.

Responsibilities

• High-level architecture specification analysis – interactive authoring and review.
• Micro-architecture development and documentation.
• RTL implementation in Verilog/SystemVerilog with timing, power, and debugging considerations.
• Converging the design to timing closure by RTL optimization strategies.
• Superb RTL debugging skills with robust RTL solutions.
• Collaborate with Verification, Software/Firmware, Emulation, and Validation teams.
• Lab support for silicon during validation.
• Must work in person; no remote work allowed.

Skills

Verilog/SystemVerilog

RTL design

High‑level architecture

Timing closure

RTL debugging

Cross‑functional collaboration

ASIC/SoC development

Education

Bachelor's degree in Electrical/Computer Engineering or equivalent

Job description

Broadcom is seeking a Digital IC Design Engineer to join the Data Center Solutions Group. You will work on RTL designs using Verilog/SystemVerilog for PCIe Switch products and enterprise storage, driving timing closure and high performance in mega datacenters.

Responsibilities include architecture analysis, micro-architecture development, RTL implementation, and debugging. Collaboration with Verification, Software/Firmware, Emulation, and Validation teams is essential.