Senior ASIC Verification Engineer - PCIe/Ethernet

Broadcom; San Jose (CA); On-site; USD 122,000 - 195,000; Full time

Benefits offered by this job

Competitive salary and equity

Job summary

Broadcom is seeking engineers to conceive and develop leadership silicon technology for datacenter and cloud operators. Join a team creating high-throughput Ethernet products and contribute to the next generation of devices with strong power efficiency.

You will work on PCIe and other host interfaces as part of an advanced product line, collaborating with a worldwide design and architecture team across multiple generations. Strong RTL and ASIC experience are required.

Qualifications

• Experience in high-speed chip architecture and RTL design.
• Hands-on ASIC design process: architecture, RTL, simulation/verification, synthesis.
• Strong communication and documentation skills; scripting with Python/Perl.

Responsibilities

• Develop leadership silicon technology for datacenter and cloud operators.
• Work on PCIe and Ethernet controller designs with front-end involvement.
• Define architecture, RTL coding, simulation, verification, synthesis, and timing closure.
• Collaborate with worldwide design and architecture teams.

Skills

RTL design

ASIC design

Ethernet PCIe

Python/Perl scripting

Education

BSEE

MSEE

Job description

Broadcom is seeking engineers to conceive and develop leadership silicon technology for datacenter and cloud operators. Join a team creating high-throughput Ethernet products and contribute to the next generation of devices with strong power efficiency.

You will work on PCIe and other host interfaces as part of an advanced product line, collaborating with a worldwide design and architecture team across multiple generations. Strong RTL and ASIC experience are required.