Senior Digital IC Design Engineer – PCIe/AI Datacenter

Broadcom; Colorado Springs (CO); On-site; USD 144,000 - 230,000; Full time

Benefits offered by this job

Medical, dental and vision plans

401(K) with company matching

Employee Stock Purchase Program (ESPP)

Job summary

Broadcom is seeking a Digital IC Design Engineer for the Data Center Solutions Group to advance AI/ML ecosystems through PCIe Switch products and enterprise storage solutions. The role focuses on RTL implementation, timing closure, and cross-functional collaboration to deliver high-performance silicon in large datacenters.

The candidate will work with Verilog/SystemVerilog, address clock domains, power considerations, and complex algorithms, in a highly collaborative, on-site environment.

Qualifications

• Bachelor’s degree required in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or equivalent.
• 12+ years of relevant industry experience.

Responsibilities

• High-level architecture specification analysis – interactive authoring and review.
• Micro-architecture development and documentation.
• High-quality, high-performance Verilog/SystemVerilog RTL implementation based on a design specification.
• Converging the design to timing closure by RTL optimization strategies.
• Superb RTL debugging skills with robust RTL solutions.
• Collaborate with Verification, Software/Firmware, Emulation, and Validation teams to support RTL design issues.
• Lab support for silicon during validation.
• Must work in person; no remote work allowed.

Skills

RTL Design

Verilog

SystemVerilog

Digital IC Design

Education

Bachelor's degree in Electrical Engineering / Electronics / Computer Science or Computer Engineering

Tools

Verilog/SystemVerilog simulators

Job description

Broadcom is seeking a Digital IC Design Engineer for the Data Center Solutions Group to advance AI/ML ecosystems through PCIe Switch products and enterprise storage solutions. The role focuses on RTL implementation, timing closure, and cross-functional collaboration to deliver high-performance silicon in large datacenters.

The candidate will work with Verilog/SystemVerilog, address clock domains, power considerations, and complex algorithms, in a highly collaborative, on-site environment.