Senior Digital Design Engineer – SoC DSP & RTL Expert

Cirrus Logic; Chandler (AZ); Hybrid; USD 90,000 - 120,000; Full time

Job summary

A leading technology company is seeking a Digital Design Engineer based in Chandler, Arizona. You will design digital subsystems and IP blocks for high-performance mixed-signal ICs. The ideal candidate will have a Bachelor's degree in Electrical Engineering with 5+ years of experience or a Master's degree with 3+ years. Proficiency in Verilog RTL design and strong analytical skills are essential. The role offers a collaborative environment and hybrid working options, contributing to innovative solutions for consumer brands.

Qualifications

• 5+ years of relevant digital IC design experience required for Bachelor's degree holders.
• Strong working knowledge of Verilog RTL design is essential.
• Experience designing and verifying complex state machines and control logic.

Responsibilities

• Design and implement digital subsystems and IP blocks for mixed-signal ICs from architecture through tape-out.
• Develop RTL designs using Verilog.
• Perform functional verification and support UVM-based verification teams.

Skills

Verilog RTL design

Digital design flow

Analytical skills

Problem-solving skills

Communication skills

Education

Bachelor’s degree in Electrical Engineering or related field

Master’s degree with 3+ years of relevant experience

PhD with 0+ years of relevant experience

Tools

MATLAB

Simulink

Job description

A leading technology company is seeking a Digital Design Engineer based in Chandler, Arizona. You will design digital subsystems and IP blocks for high-performance mixed-signal ICs. The ideal candidate will have a Bachelor's degree in Electrical Engineering with 5+ years of experience or a Master's degree with 3+ years. Proficiency in Verilog RTL design and strong analytical skills are essential. The role offers a collaborative environment and hybrid working options, contributing to innovative solutions for consumer brands.