Senior DFT Engineer - SoC Verification & ATPG

Value Innovation Labs; Mountain View (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

Value Innovation Labs is seeking an experienced DFT Engineer in Mountain View, CA to drive DFT flow, IP integration, and verification activities within complex SoCs. The role collaborates with synthesis and verification teams to leverage industry-standard DFT EDA tools and optimize designs for advanced process nodes.

The ideal candidate has a strong background in ATPG and ATPG-driven verification, along with practical experience in Silicon technology, high-speed and low-power design tradeoffs.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field, or equivalent practical experience.

Responsibilities

• DFT flow and IP integration.
• Interaction with Synthesis and Verification flows.
• Industry-standard DFT EDA tools usage.
• Considerations for silicon process and advanced technology nodes.
• Address high-speed and low-power design considerations.

Skills

DFT flow

ATPG

SoC verification

DFT EDA tools

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Job description

Value Innovation Labs is seeking an experienced DFT Engineer in Mountain View, CA to drive DFT flow, IP integration, and verification activities within complex SoCs. The role collaborates with synthesis and verification teams to leverage industry-standard DFT EDA tools and optimize designs for advanced process nodes.

The ideal candidate has a strong background in ATPG and ATPG-driven verification, along with practical experience in Silicon technology, high-speed and low-power design tradeoffs.