SoC DFT Architect: ATPG, MBIST & Silicon Validation

Apple Inc.; Cupertino (CA); On-site; USD 150,000 - 190,000; Full time

Job summary

Apple Inc. in Cupertino is seeking a DFT engineer to contribute to the complete DFT solution for a design project. You will develop and implement DFT architecture, build DFT infrastructure, and collaborate with DV teams to verify implementations and ECOs, ensuring robust test coverage for silicon.

The role requires B.S. plus 0 years of experience, with hands-on skills in Verilog/VHDL, DFT methodologies, and scripting to support ATE data analysis.

Qualifications

• BS degree with 0 years relevant industry experience.

Responsibilities

• Developing and implementing DFT architecture.
• Implementing DFT infrastructure.
• Working with the DV team to verify DFT implementations and ECOs.
• Generating structural test vectors and analyzing coverage.
• Working with designers on STA, physical, power and logical issues.

Skills

DFT concepts

Verilog/VHDL

DFT debugging

Scripting

STA analysis

Education

Bachelor's degree

Tools

Verilog/VHDL simulators

Waveform debugging tools

Scripting (Python/Perl)

Job description

Apple Inc. in Cupertino is seeking a DFT engineer to contribute to the complete DFT solution for a design project. You will develop and implement DFT architecture, build DFT infrastructure, and collaborate with DV teams to verify implementations and ECOs, ensuring robust test coverage for silicon.

The role requires B.S. plus 0 years of experience, with hands-on skills in Verilog/VHDL, DFT methodologies, and scripting to support ATE data analysis.