Senior Design Verification Engineer for AI Accelerator SoC

DensityAI; Mountain View (CA); On-site; USD 200,000 - 300,000; Full time

Benefits offered by this job

Equity grant

Medical / dental / vision

401(k)

Paid time off

Job summary

DensityAI is seeking an experienced Design Verification engineer to lead end-to-end pre-silicon verification for AI accelerator silicon. The role, a senior IC verification IC, partners with HW design and software teams to drive the program from first silicon through scale-out.

You will own a testing domain, develop comprehensive verification strategies across IP to SOC, and leverage AI-assisted tool flows to accelerate timelines, ensuring functional closure and robust design verification.

Qualifications

• 5+ years of pre-silicon verification experience in end-to-end verification for complex IP/subsystems/SoCs.
• Strong ability to drive verification ownership and deliverables across hardware and software teams.
• Well-versed in UVM methodology and testbench architecture.

Responsibilities

• Own an entire testing domain based on expertise.
• Develop end-to-end testing strategy from IP to SOC-level and to emulation for AI accelerator silicon.
• Use and develop AI-assisted tool flows to accelerate verification and emulation timeline.

Skills

End-to-end verification

UVM methodology

Testbench architecture

SoC/subsystem verification

Emulation testing

Tools

Palladium

Veloce

Job description

DensityAI is seeking an experienced Design Verification engineer to lead end-to-end pre-silicon verification for AI accelerator silicon. The role, a senior IC verification IC, partners with HW design and software teams to drive the program from first silicon through scale-out.

You will own a testing domain, develop comprehensive verification strategies across IP to SOC, and leverage AI-assisted tool flows to accelerate timelines, ensuring functional closure and robust design verification.