Senior Design Verification Engineer - AI-Driven Validation

Micron Technology, Inc.

Minneapolis (MN)

On-site

USD 122,000 - 208,000

Full time

6 days ago
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Job summary

Micron Technology, Inc. is seeking an experienced ASIC Design Verification professional to own end-to-end verification environments for next-generation SoCs.

You will collaborate with design and architecture teams to validate complex blocks and ensure high-quality silicon on schedule. The role emphasizes hands-on SystemVerilog, UVM-based verification, and a focus on AI-assisted approaches to improve debugging efficiency and productivity.

Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering
  • 6+ years of experience in IP and/or SoC verification
  • Hands-on experience with UVM and constrained-random verification
  • Strong proficiency in SystemVerilog
  • Proven analytical, debugging, and communication skills

Responsibilities

  • Develop and maintain UVM-based SystemVerilog verification environments
  • Define and execute block and system-level verification plans
  • Debug complex functional and integration issues in close collaboration with design teams
  • Drive coverage closure and continuously improve verification quality metrics
  • Explore and adopt AI-assisted techniques and tools to improve verification productivity and debug efficiency

Skills

UVM
SystemVerilog
Constrained-random verification
IP/SoC verification
Analytical skills
Communication skills

Education

Bachelor's or Master's in Electrical Engineering or Computer Engineering

Tools

AI-assisted verification tools
Debugging tools

Job description

Micron Technology, Inc. is seeking an experienced ASIC Design Verification professional to own end-to-end verification environments for next-generation SoCs.

You will collaborate with design and architecture teams to validate complex blocks and ensure high-quality silicon on schedule. The role emphasizes hands-on SystemVerilog, UVM-based verification, and a focus on AI-assisted approaches to improve debugging efficiency and productivity.

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