Senior Design Verification Engineer

Quest Global; Santa Clara (CA); On-site; USD 138,000 - 190,000; Full time

Job summary

A leading engineering services company is seeking a Talent Acquisition Lead to drive the recruitment of semiconductor professionals. This role involves creating advanced verification methodologies, requiring high-level expertise in programming and verification tools. The ideal candidate will have over 10 years of relevant experience and exceptional communication skills, positioning them to effectively collaborate across divisions.

Qualifications

• 10+ years industry experience required.
• Strong in HVL (UVM / SystemVerilog / OVM) and C/C++.
• Good knowledge of EDA tools and mixed-signal IC verification.

Responsibilities

• Create testbenches in SystemVerilog with UVM.
• Utilize advanced verification techniques.
• Write tools and scripts to enhance the verification process.

Skills

UVM

SystemVerilog

C/C++

Perl

TCL

Tools

EDA tools

Job description

3 days ago Be among the first 25 applicants

Get AI-powered advice on this job and more exclusive features.

Direct message the job poster from Quest Global

Talent Acquisition Lead @ Quest || Ex-Qualcomm || Ex-NVIDIA || VLSI/Semiconductor Recruitment Professional

• Create testbenches in SystemVerilog with UVM

• Utilize advanced verification techniques

• Write tools and scripts to enhance the verification process

Qualifications and requirements:

• 10+ years industry experience required.
• Design Verification of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.
• Strong in HVL (UVM / SystemVerilog / OVM), C/C++, Perl, TCL programming/scripting skills, verification methodologies and flows.
• Strong in constraint random verification, assertion writing, coverage analysis, debugging.
• Familiarity with ARM cores, formal verification, SV DPI-C is a plus.
• Experience with AMS/Low Power verification techniques and verifying mixed signal ICs a plus.
• Good knowledge of EDA tools. Experience with signal processing and FPGA based prototyping a plus.
• Must be a team player with good oral and written communication skills.
• Self-motivated with the ability to work independently and interface effectively with engineers across divisions and remote locations

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Engineering Services, Semiconductor Manufacturing, and Computer Hardware Manufacturing

Referrals increase your chances of interviewing at Quest Global by 2x

Get notified about new Design Verification Engineer jobs in Santa Clara, CA.

Design Verification Engineer (University Grad)

Sunnyvale, CA $114,000.00-$133,000.00 2 weeks ago

Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago

Mountain View, CA $132,000.00-$189,000.00 2 weeks ago

Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago

San Jose, CA $149,600.00-$214,100.00 2 weeks ago

Santa Clara, CA $138,452.00-$190,000.00 2 days ago

ASIC Design Verification I (Full Time) United States

San Jose, CA $92,500.00-$115,500.00 2 days ago

Santa Clara, CA $108,000.00-$212,750.00 1 day ago

SOC Verification and Methodology Engineer

Sunnyvale, CA $114,000.00-$166,000.00 2 weeks ago

Physical Design and Verification Engineer

Sunnyvale, CA $142,000.00-$203,000.00 2 weeks ago

Design Verification Engineer (Fulltime role only)

Mountain View, CA $107,900.00-$242,000.00 5 days ago

San Jose, CA $133,300.00-$186,800.00 2 days ago

Mountain View, CA $220,000.00-$270,000.00 2 weeks ago

Sunnyvale, CA $173,000.00-$249,000.00 2 weeks ago

CPU Verification Engineer (Multiple Locations)

Santa Clara, CA $96,000.00-$184,000.00 44 minutes ago

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.