Senior Design Verification Engineer

Core ASIC Inc; San Diego (CA); On-site; USD 130,000 - 190,000; Full time

Job summary

Core ASIC Inc in San Diego seeks an experienced RTL Verification engineer with 5 to 15 years in SystemVerilog and UVM. You will verify complex SoCs, drive functional verification, and collaborate across design, test, and firmware teams to ensure quality tape-outs.

The role requires strong knowledge of AMBA protocols and high-speed interfaces, experience with Synopsys/Cadence tools, and scripting for automation.

Qualifications

• Strong functional verification skills for complex SoCs.
• Solid RTL design expertise and review of synthesizable RTL.
• Proficiency in formal verification techniques and tools.
• Good understanding of pipelines, caches, buses and memory subsystems.
• Experience with SystemVerilog, UVM or similar frameworks.
• Familiarity with simulation, coverage and regression infrastructures; scripting in Python/Perl/shell.

Skills

Functional verification

RTL design

Formal verification

Computer architecture

SystemVerilog/UVM

Simulation/coverage/regression

Cross-functional teamwork

IP verification/VIP/Emulation

Education

Bachelors or Masters in Electrical/ Electronics/ Computer Engineering

Tools

Synopsys

Cadence

Job description

Experience: 5 to 15 years of experience as a RTL Verification engineer.

Job Description:

System Verilog, UVM

Good knowledge in AMBA,AX4,AHB

Good knowledge in One of the High speed IF protocol like PCIe6, DDR5, Ethernet or USB3

Experience in Synopsys/Cadance Tools usage

Qualifications

• Strong functional verification skills, including Functional Verification and Debugging for complex digital designs and SoCs.
• Solid RTL Design expertise, with hands-on experience in writing, reviewing, and validating synthesizable RTL.
• Proficiency in Formal Verification techniques and tools to complement simulation-based verification.
• Good understanding of Computer Architecture concepts such as pipelines, caches, buses, and memory subsystems.
• Experience with industry-standard verification languages and methodologies (e.g., SystemVerilog, UVM or similar frameworks).
• Familiarity with simulation, coverage, and regression infrastructures and scripting (e.g., Python, Perl, or shell) to automate workflows.
• Bachelor's or Master's degree in Electrical Engineering, Electronics, Computer Engineering, or a related field.
• Several years of relevant experience in ASIC/SoC verification, with a track record of successful tape-outs
• Company Description Core ASIC Inc is a customer-focused VLSI design and verification services company with operations in Bangalore, India and Austin, Texas. The company delivers complete spec-to-silicon turnkey solutions, including firmware co-development, for custom semiconductor and IoT applications. Its silicon-proven platform solutions support IP design and verification, VIP development, SoC verification, and emulation services. Core ASIC emphasizes on-time delivery, close alignment with client vision, and a strong focus on time-to-market and ROI. A dedicated team of engineering, technology, and domain experts works as growth partners for clients across the product development lifecycle. or production silicon.
• Ability to collaborate effectively in cross-functional teams, mentor junior engineers, and communicate clearly in written and verbal form.
• Experience in IP verification, VIP development, or emulation/prototyping environments is a plus.