Senior Design Verification Engineer

Silicon Labs; Austin (TX); On-site; USD 125,000 - 231,000; Full time

Benefits offered by this job

Health insurance

401k with company match

RSUs equity

Job summary

Silicon Labs in Austin, Texas is seeking a Senior Design Verification Engineer to ensure the functional correctness and performance of digital modem designs used in our low-power wireless products. You will craft verification strategies, develop scalable test environments, and work with cross-disciplinary teams across PHY/MAC to drive robust, validated silicon.

Joining this role means collaborating with design, architecture, and firmware teams throughout the product lifecycle, from early design

Qualifications

• BSEE/CE or related field required.
• Experience with SystemVerilog and UVM.
• Strong debugging and scripting skills (Python/Perl).

Responsibilities

• Define and execute verification strategies for digital modem designs.
• Develop scalable verification environments using SystemVerilog/UVM.
• Create test plans, test benches, and stimuli to achieve high functional and coverage closure.
• Debug and analyze design issues, working closely with design and architecture teams to resolve them.
• Track and drive functional and code coverage to ensure verification completeness.
• Collaborate cross-functionally with firmware, validation, and system teams to ensure correct system behavior.
• Support silicon bring-up and correlate pre-silicon verification with post-silicon results.
• Continuously improve verification methodologies, tools, and automation workflows.

Skills

Digital design fundamentals

Verification concepts

Wireless PHY concepts

Debugging in simulation

Collaboration in cross-functional team

Education

BSEE/CE or related field

Tools

SystemVerilog

UVM

Python/Perl scripting

Job description

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.

Senior Design VerificationEngineer

Austin, Texas

Meetthe team

The Wireless PHYMAC teamis responsible fordesigning the digitalcomponentsof Silicon Labs’low powerenergy-efficient wireless products. Our team focuses on building efficient, high-performance digital systems that enable wireless connectivity across applications such as smarthome, industrial IoT, and smart cities.The teamoperatesin a highly collaborative and cross-functional environment, working closely with system architects, analog/RF designers, firmware engineers, and product teams to deliver robust and scalable wireless solutions. By working at the intersection of digital design and wireless systems, the team plays a critical role in advancing the future of connected devices.

About The Role

As aSenior Design Verification Engineer, you willbe responsible forensuring the functional correctness and performance of digital modem designs used in Silicon Labs’ low-power wireless products. You will work closely with design, architecture, and system teams to develop verification strategies, build robust test environments, and debug complex issues across the PHY/MAC layers. This role offers the opportunity to contribute throughout the product lifecycle—from early design through silicon bring-up—while working oncutting-edgewireless technologies that power next-generation connected devices.

Responsibilities

• Define and execute verification strategies for digital modem designs across key wireless use cases
• Develop andmaintainscalable verification environments usingSystemVerilog/UVM or similar methodologies
• Create test plans,test benches, and stimuli to achieve high functional and coverage closure
• Debug and analyze design issues, working closely with design and architecture teams to resolve them
• Track and drive functional and code coverage to ensure verification completeness
• Collaborate cross-functionally with firmware, validation, and system teams to ensure correct system behavior
• Support silicon bring-up and correlate pre-silicon verification with post-silicon results
• Continuously improve verification methodologies, tools, and automation workflows

Minimum Qualifications

• BSEE/CE or a related field
• Solid understanding of digital design fundamentals and verification concepts
• 3-6 years of experience in digital design verification, with a focus on modem or wireless PHY designs preferred
• Experience withSystemVerilogand UVM or similar verification methodologies
• Strong debugging skills with experience analyzing simulation results andidentifyingroot causes
• Familiarity with scripting languages such as Python or Perl for automation
• Basic understanding of wireless communication systems or digital signal processing concepts
• Strong problem-solving skills and ability to work effectively in a collaborative team environment

Preferred Qualifications

• Experience verifying wireless standards such as BLE, Wi-Fi, Zigbee, or similar technologies
• Experience with advanced verification techniques such as constrained-random, coverage-driven verification, andSystemVerilogassertions (SVA)
• Familiarity with C/C++ or MATLAB for algorithm modeling and reference model development
• Experience with mixed-signal or system-level verification, including co-simulation with analog/RF components
• Exposure to post-silicon validation, lab bring-up, and correlation with pre-silicon results
• Experience with low-power design verification and power-aware methodologies

Benefits & Perks

You can look forward to the following benefits:

• Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental & vision plans
• Flexible vacation plan.
• Highly competitive salary
• 401k plan with match and Roth plan option
• Equity rewards (RSUs)
• Life/AD&D and disability coverage
• Flexible spending accounts
• Adoption assistance
• Back-Up childcare
• Additional benefit options (Commuter benefits, Legal benefits, Pet insurance)
• 3 paid volunteer days per year
• Charitable contribution match
• Tuition reimbursement
• Monthly wellness offerings
• Free snacks
• Monthly company updates with our CEO

The annualized base pay range for this role is expected to be between $124,600 - $231,400 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.

Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.