Senior Design Verification Engineer

Silicon Labs Careers; Austin (TX); On-site; USD 125,000 - 231,000; Full time

Benefits offered by this job

Medical benefits

401k with match

Equity rewards

Paid time off

Education assistance

Job summary

Silicon Labs in Austin, TX is seeking a Senior Design Verification Engineer to validate digital modem designs for low-power wireless products. You will define verification strategies, build robust test environments, and debug complex issues across PHY/MAC layers throughout the product lifecycle.

You will collaborate with design, architecture, firmware, validation, and system teams, using SystemVerilog/UVM and scripting to achieve high coverage.

Qualifications

• BS EE/CE or related field required.
• 3–6 years in digital design verification with modem or wireless PHY focus.
• Strong SystemVerilog/UVM skills and debugging abilities.
• Proficient Python or Perl for automation.
• Experience with BLE/Wi‑Fi or Zigbee is a plus.

Responsibilities

• Define and execute verification strategies for digital modem designs.
• Develop scalable verification environments using SystemVerilog/UVM.
• Create test plans, benches, and stimuli to achieve coverage goals.
• Debug design issues and collaborate with design teams.
• Track functional and code coverage to ensure verification completeness.
• Support silicon bring-up and correlate pre/post-silicon results.

Skills

SystemVerilog/UVM

Digital design verification

Python scripting

Debugging

Wireless PHY concepts

Education

BSEE/BSE or CE or related field

Tools

SystemVerilog

UVM

C/C++

Job description

Silicon Labs (NASDAQ: SLAB) is the leading innovator in low-power wireless connectivity, building embedded technology that connects devices and improves lives. Merging cutting-edge technology into the world’s most highly integrated SoCs, Silicon Labs provides device makers the solutions, support, and ecosystems needed to create advanced edge connectivity applications. Headquartered in Austin, Texas, Silicon Labs has operations in over 16 countries and is the trusted partner for innovative solutions in the smart home, industrial IoT, and smart cities markets. Learn more at www.silabs.com.Senior Design Verification EngineerAustin, TexasMeet the teamThe Wireless PHYMAC team is responsible for designing the digital components of Silicon Labs’ low power energy-efficient wireless products. Our team focuses on building efficient, high-performance digital systems that enable wireless connectivity across applications such as smart home, industrial IoT, and smart cities. The team operates in a highly collaborative and cross-functional environment, working closely with system architects, analog/RF designers, firmware engineers, and product teams to deliver robust and scalable wireless solutions. By working at the intersection of digital design and wireless systems, the team plays a critical role in advancing the future of connected devices.About the RoleAs a Senior Design Verification Engineer, you will be responsible for ensuring the functional correctness and performance of digital modem designs used in Silicon Labs’ low-power wireless products. You will work closely with design, architecture, and system teams to develop verification strategies, build robust test environments, and debug complex issues across the PHY/MAC layers. This role offers the opportunity to contribute throughout the product lifecycle—from early design through silicon bring-up—while working on cutting-edge wireless technologies that power next-generation connected devices.ResponsibilitiesDefine and execute verification strategies for digital modem designs across key wireless use casesDevelop and maintain scalable verification environments using SystemVerilog/UVM or similar methodologiesCreate test plans, test benches, and stimuli to achieve high functional and coverage closureDebug and analyze design issues, working closely with design and architecture teams to resolve themTrack and drive functional and code coverage to ensure verification completenessCollaborate cross-functionally with firmware, validation, and system teams to ensure correct system behaviorSupport silicon bring-up and correlate pre-silicon verification with post-silicon resultsContinuously improve verification methodologies, tools, and automation workflowsMinimum QualificationsBSEE/CE or a related fieldSolid understanding of digital design fundamentals and verification concepts3-6 years of experience in digital design verification, with a focus on modem or wireless PHY designs preferredExperience with SystemVerilog and UVM or similar verification methodologiesStrong debugging skills with experience analyzing simulation results and identifying root causesFamiliarity with scripting languages such as Python or Perl for automationBasic understanding of wireless communication systems or digital signal processing conceptsStrong problem-solving skills and ability to work effectively in a collaborative team environmentPreferred QualificationsExperience verifying wireless standards such as BLE, Wi-Fi, Zigbee, or similar technologiesExperience with advanced verification techniques such as constrained-random, coverage-driven verification, and SystemVerilog assertions (SVA)Familiarity with C/C++ or MATLAB for algorithm modeling and reference model developmentExperience with mixed-signal or system-level verification, including co-simulation with analog/RF componentsExposure to post-silicon validation, lab bring-up, and correlation with pre-silicon resultsExperience with low-power design verification and power-aware methodologiesBenefits & PerksYou can look forward to the following benefits:Great medical (Choice of PPO or Consumer Driven Health Plan with HSA), dental & vision plansFlexible vacation plan.Highly competitive salary401k plan with match and Roth plan optionEquity rewards (RSUs)Life/AD&D and disability coverageFlexible spending accountsAdoption assistanceBack-Up childcareAdditional benefit options (Commuter benefits, Legal benefits, Pet insurance)3 paid volunteer days per yearCharitable contribution matchTuition reimbursementMonthly wellness offeringsFree snacksMonthly company updates with our CEO#LI AA1The annualized base pay range for this role is expected to be between $124,600 - $231,400 USD. Actual base pay could vary based on factors including but not limited to experience, geographic location where work will be performed and applicant’s skill set. The base pay is just one component of the total compensation package for employees. Other rewards may include an annual cash bonus, equity package and a comprehensive benefits package.Silicon Labs is an equal opportunity employer and values the diversity of our employees. Employment decisions are made on the basis of qualifications and job-related criteria without regard to race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status, or any other characteristic protected by applicable law.