Senior Design Lead - Physical Design

HCL Technologies Limited

San Jose (CA)

On-site

USD 150,000 - 230,000

Full time

34 hours ago
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Benefits offered by this job

Medical, dental, vision insurance
401(k) retirement plan
Paid time off
Performance-based bonuses

Job summary

HCL Technologies Limited is seeking an experienced physical design engineer to drive floorplanning, power planning, CTS, and routing with strong timing closure capabilities.

You will work closely with Foundry and CAD teams, debug complex timing/power issues, and push for automation to improve signoff efficiency across advanced nodes like 7nm/5nm.

Qualifications

  • 7+ years of industry experience in physical design and timing closure.
  • Exposure to TSMC 2NP/3NP process nodes is a must.
  • Strong skills in floorplanning, CTS, routing and signoff processes.
  • Able to debug timing, power, congestion and variability issues with automation.

Responsibilities

  • Execute floorplanning, power planning and placement optimization.
  • Implement CTS and routing flows to achieve timing closure across modes.
  • Resolve DRC/LVS/ERC and signoff violations with signoff teams.
  • Perform physical verification and signoff including SI/Crosstalk and IR drop analysis.
  • Collaborate with foundry and CAD teams and drive methodology improvements.
  • Develop automation scripts/flows to accelerate signoff and verification.

Skills

Floorplanning
Power planning
Placement & optimization
CTS (Clock Tree Synthesis)
Routing
Timing closure
DRC/LVS/ERC signoff
Physical verification
Automation scripting
Collaboration with Foundry & CAD teams

Tools

TSMC 2NP/3NP exposure

Job description

  • Floorplanning
  • Power planning (PG grid, IR)
  • Placement & optimization
  • CTS (Clock Tree Synthesis)
  • Routing
  • Achieve timing closure across all modes and corners
  • Resolve DRC, LVS, ERC and signoff violations
  • Perform physical verification and signoff:
  • SI / Crosstalk
  • IR drop & EM analysis
  • Work on advanced nodes (7nm, 5nm, 3nm or below)
  • Collaborate with:
  • Foundry and CAD teams
  • Debug complex timing, congestion, power, and variability issues
  • Drive methodology improvements and automation (scripts/flows)
Key Responsibilities
  • Experience : 7+ years
  • Exposure to TSMC 2NP/3NP is must
  • Floorplanning
  • Power planning (PG grid, IR)
  • Placement & optimization
  • CTS (Clock Tree Synthesis)
  • Routing
  • Achieve timing closure across all modes and corners
  • Resolve DRC, LVS, ERC and signoff violations
  • Perform physical verification and signoff:
  • SI / Crosstalk
  • IR drop & EM analysis
  • Work on advanced nodes (7nm, 5nm, 3nm or below)
  • Collaborate with:
  • Foundry and CAD teams
  • Debug complex timing, congestion, power, and variability issues
  • Drive methodology improvements and automation (scripts/flows)
Skill Requirements
  • Experience : 7+ years
  • Exposure to TSMC 2NP/3NP is must
  • Floorplanning
  • Power planning (PG grid, IR)
  • Placement & optimization
  • CTS (Clock Tree Synthesis)
  • Routing
  • Achieve timing closure across all modes and corners
  • Resolve DRC, LVS, ERC and signoff violations
  • Perform physical verification and signoff:
  • SI / Crosstalk
  • IR drop & EM analysis
  • Work on advanced nodes (7nm, 5nm, 3nm or below)
  • Collaborate with:
  • Foundry and CAD teams
  • Debug complex timing, congestion, power, and variability issues
  • Drive methodology improvements and automation (scripts/flows)
Other Requirements
  • Experience : 7+ years
  • Exposure to TSMC 2NP/3NP is must
  • Floorplanning
  • Power planning (PG grid, IR)
  • Placement & optimization
  • CTS (Clock Tree Synthesis)
  • Routing
  • Achieve timing closure across all modes and corners
  • Resolve DRC, LVS, ERC and signoff violations
  • Perform physical verification and signoff:
  • SI / Crosstalk
  • IR drop & EM analysis
  • Work on advanced nodes (7nm, 5nm, 3nm or below)
  • Collaborate with:
  • Foundry and CAD teams
  • Debug complex timing, congestion, power, and variability issues
  • Drive methodology improvements and automation (scripts/flows)

At HCLTech, you'll supercharge your potential. You'll find your career. And you'll find your spark. All at a place that knows that helping its customers stay on top starts by putting its people first.

HCLTech is a global technology company, home to more than 223,000 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending June 2026totaled $14.8billion.

Compensation and Benefits

A candidate’s pay within the range will depend on their skills, experience, education, and other factors permitted by law. This role may also be eligible for performance-based bonuses subject to company policies. In addition, this role is eligible for the following benefits subject to company policies: medical, dental, vision, pharmacy, life, accidental death & dismemberment, and disability insurance; employee assistance program; 401(k) retirement plan; 10 days of paid time off per year (some positions are eligible for need-based leave with no designated number of leave days per year); and 10 paid holidays per year.

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