Senior DDR5/6 PHY Architect & Engineering Lead

Renesas Electronics; Austin (TX); On-site; USD 180,000 - 240,000; Full time

Job summary

Renesas Electronics in Austin, Texas, seeks a Senior Analog Engineering Manager to lead DDR5 and next-generation DDR6 PHY development for advanced SoCs, blending deep high-speed memory expertise with strong people leadership and program ownership.

You will guide architecture through silicon bring-up, drive performance and reliability, build a high‑caliber analog/mixed-signal team, shape the DDR6 roadmap, and collaborate with digital PHY, SoC, packaging, PCB, SI/PI, and validation groups.

Qualifications

• 12+ years of analog/mixed-signal IC design experience
• 5+ years of people-management and technical leadership
• Proven hands-on delivery of DDR5 PHYs or late-stage DDR4 designs transitioning to DDR5
• Strong expertise in High-speed IO design, signal integrity, PLL/DLL and low-jitter clocking architectures
• Mixed-signal verification and silicon validation

Responsibilities

• Own architecture, design, and implementation of DDR5 PHYs and contribute to DDR6-ready architectures
• Provide technical oversight for analog/mixed-signal blocks including high-speed TX/RX datapaths and training circuits
• Lead post-silicon bring-up, characterization, debug, and yield improvement
• Build, lead, and mentor a team of analog/mixed-signal designers; drive hiring and onboarding
• Partner with Digital PHY, controller teams, SoC integration, packaging, PCB, SI/PI, validation, product and program management

Skills

People leadership

Technical leadership

Team mentorship

Strategic thinking

Communication skills

Education

Bachelor’s or Master’s degree in Electrical Engineering

PhD preferred

Job description

Renesas Electronics in Austin, Texas, seeks a Senior Analog Engineering Manager to lead DDR5 and next-generation DDR6 PHY development for advanced SoCs, blending deep high-speed memory expertise with strong people leadership and program ownership.

You will guide architecture through silicon bring-up, drive performance and reliability, build a high‑caliber analog/mixed-signal team, shape the DDR6 roadmap, and collaborate with digital PHY, SoC, packaging, PCB, SI/PI, and validation groups.