Senior Datacenter GPU Power & Performance Architect

Socket.dev; Austin (TX); On-site; USD 180,000 - 240,000; Full time

Job summary

AMD’s Datacenter Performance Group is seeking a Senior Power & Performance Architect to drive power-constrained performance for Instinct AI/ML/HPC accelerators. You will own perf@power attainment from pre-Si modeling to product launch, working with SOC design, system, and power teams to set targets and track progress.

The role requires strong communication across engineering and executive leadership, plus expertise in DL/ML workloads.

Qualifications

• Background in Computer Architecture, Processor/Accelerator development.
• Experience in Power/Performance projections and modeling at SoC/system level.
• Familiarity with digital logic physical design and power management techniques.
• Experience with post-silicon power/perf debug and model correlation.
• Strong communication with engineering teams, business leads, and executives.

Responsibilities

• Own power-constrained performance modeling and targets from pre-Si to launch.
• Define product configurations, capabilities and P&P targets with product teams.
• Lead P&P attainment across engineering functions including SOC, CAD, Power, Software.
• Present Power/Performance readouts to executives and motivate teams toward efficiency.
• Mentor junior engineers and develop PPA methodologies and skillsets.

Skills

Computer Architecture

Power/Performance modeling

SoC/System design

Post-silicon power debug

Communication with executives

DL/ML/LLM workloads knowledge

Education

Bachelor’s or Master’s in CS/CE/EE

Job description

AMD’s Datacenter Performance Group is seeking a Senior Power & Performance Architect to drive power-constrained performance for Instinct AI/ML/HPC accelerators. You will own perf@power attainment from pre-Si modeling to product launch, working with SOC design, system, and power teams to set targets and track progress.

The role requires strong communication across engineering and executive leadership, plus expertise in DL/ML workloads.